The ePixUHR35kHz Megapixel Cameras project aims to provide modular detector blocks that can be configured into larger cameras in various structural configurations. The smallest building block is a 3x2 detector sensor module which has a total of 3*2*192*168=193536≈200k pixels. Six of these (6*193536=1161216≈1M pixels) modules are assembled together into a 1 megapixel (1M) camera as shown below to the left. Four of the 1M cameras can then be assembled together around a central beam pipe aperture to form a 4M camera shown in the middle below. The largest configuration foreseen for this project is the 16M camera that consists of 16 of the 1M camera blocks as shown below on the right.
1 megapixels (1M)
6x 3x2 sensor modules:
16 megapixels (16M)
16x 1M camera assemblies:
The electronics for the 3x2 sensor module is split into two parts; the ASIC carrier (left in the block diagram below) and the readout board (right in the block diagram). They are electrically connected together through a right-angle connector from the Samtec SEARAY connector family, which provides a total of 500 pins for signals and power. The ASIC carrier contains the 3x2 ASICs together with the 3x2 sensor and minimal amount of other components in order to reduce the size and therefore increase the sensitive area of the detector focal plane (the are which is covered by a sensitive sensor). All the active circuitry for interfacing and powering the ASICs is located on the readout board as well as the components for optical communication with the external back-end system.
Multi-board assembly | Readout Board | ASIC Carrier Board | |
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3D view | |||
Name | ePixUHR35kfps-3x2-concept | ePixUHR35kfps-3x2-readout-board-concept | ePixUHR35kfps-3x2-ASIC-carrier-board-concept |
Overview page | |||
Altium 365 project | https://stanford-linear-accelerator-center.365.altium.com/designs/1C32F53F-0F7D-4FA6-A6A2-A68D0AD370D8 | ||
Dimensions (X x Y) | TBD | 59mm x 160mm | 60.61mm x 42mm |
STEP 3D model | ePixUHR35kfps-3x2-concept.step | ePixUHR35kfps-3x2-readout-board-concept-PCB.step | ePixUHR35kfps-3x2-ASIC-carrier-board-concept-PCB.step |
SAMTEC SEAF8/SEAM8 series connector will be used with 10x40=400 pins in one connector.
Readout board connector | Carrier board connector | |
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3D model |
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Photo of sample |
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Part number | SEAF8-40-1-S-10-2-RA | SEAM8-40-S02.0-S-10-3 |
Product page | https://www.samtec.com/products/seaf8-40-1-s-10-2-ra | https://www.samtec.com/products/seam8-40-s02.0-s-10-3 |
Catalog | [online version] - [local pdf] | [online version] - [local pdf] |
Drawing | [online version] - [local pdf] | [online version] - [local pdf] |
Footprint | [online version] - [local pdf] | [online version] - [local pdf] |
STEP 3D model | SEAF8-40-1-S-10-2-RA.stp | SEAM8-40-S02.0-S-10-3.stp |
Note: Due to the use of a right-angle connector there will be different path lengths for signals in different rows. See High Speed Characterization Report from Samtec.
Table 16 on page 38 shows the propagation delay of the first row A (~100 ps) to the last row K (~180 ps) for different signal configurations. These propagation delay values have been assigned to the right-angle connector footprint pads for each row and will therefore be included in the propagation delay calculation in Altium when a trace is routed.
The P and N signal of differential pairs should be placed in the same row to avoid skew between them. Timing critical signals should take into account the different propagation delays for the rows.
Propagation delays, cells with yellow color have been interpolated from the data in the report.
Row | Single-ended: 1:1 S/G | Single-ended: 2:1 S/G | Differential: Optimal Horizontal | Assigned in Altium |
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A | 96 ps | 103 ps | 94 ps | 100 ps |
B | 106 ps | 111 ps | 103 ps | 109 ps |
C | 115 ps | 118 ps | 112 ps | 118 ps |
D | 125 ps | 128 ps | 120 ps | 127 ps |
E | 135 ps | 137 ps | 129 ps | 136 ps |
F | 144 ps | 147 ps | 137 ps | 144 ps |
G | 153 ps | 156 ps | 146 ps | 153 ps |
H | 162 ps | 166 ps | 154 ps | 162 ps |
J | 172 ps | 176 ps | 165 ps | 171 ps |
K | 182 ps | 186 ps | 174 ps | 180 ps |
Average difference: | 9.6 ps | 9.2 ps | 8.9 ps | 8.9 ps |
The ePixUHR 100 kHz ASIC is used in this project. The main properties are:
Resources:
These measurements are taken from a GDS file (ePixUHR_100kHz_4Julie.gds) that was opened in KLayout.
Full matrix | Lower left corner | Lower right corner | |
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Image | |||
Measurements |
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A footprint has been created in Altium Designer for the ASIC. The sizes and measurements listed above have been used and rounded to the nearest µm.
Full matrix | Lower left corner | Lower right corner | |
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Image | |||
Measurements |
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Due to asymmetry in the ASICs, the edges of the top row do not align exactly with the edges of the bottom row. The top row is shifted horizontally by 1.35 µm relative to the bottom row. The ASICs are spaced 19485 µm apart horizontally.
Full sensor | Lower left corner | Between two ASICs at the bottom | Lower right corner | Between ASICs in the middle | Top left corner | Top right corner | |
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Image | |||||||
Measurements |
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pixel / array size
arrangement 3x2, 2x2, 1x1
Link to mechanical models
The block diagrams have been created with Draw.io instead of the Gliffy integration in Confluence, which has major issue as soon as there are more than 100 items in the diagram it seems. It slows down the whole confluence page and it's near impossible to edit the diagram. There are also major limitations in the tools available in Gliffy, e.g. there doesn't seem to be a way to draw an arbitrary polygon or parallelograms.
Notes from beam line and design teams meetings