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*it is almost the same as KC705 for firmware compiling. So, I don't repeat them, but just show the most import steps below:

  • choose "IBERT Ultrascale GTH": Image Added
  • set the LineRate and RefClk Image Added
  • Protocol selection: Image Added
    • SMA interface connected to the Quad_226 
    • MGTREFCLK0 227 is connected to a Silicon Labs Si570 programmable low-jitter clock. the default output frequency is 156.25MHz. We will change it to 128MHz when powering the FPGA board up. 
  • system clock settings:Image Added


Computer to control the FPGA board

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