Gather input files

  • Find the project's .ncd and .mbb files
  • Place (copy) them in your workspace/firmware/<project> directory
  • Commit the project to svn when satisfied

Generate .bit file

  • The following will build the .bit file in your workspace/build/firmware<project> area (along with other files) 
    cd workspace/firmware/<project>
../bin/mkbit ../../build/bootstrap/bin/ppc-rtems-<platform>-opt/bootLoader.elf <project>
  • Note that <project> in the last line does not include any file extension
  • There is no need to version control the .bit file

Generate/update the .mcs file

  • Run iMPACT from the build/firmware/<project> directory 
    cd workspace/build/firmware/<project>
impact
    • 405: Select Xilinx Flash/PROM, click green arrow
    • 440: Select BPI Flash Single FPGA-> Configure Single FPGA, click green arrow
    • 405: Select Platform Flash for PROM Family
    • 440: Select Virtex 5 for Target FPGA
    • 405: Select xcf32p [32 M] for Device (bits)
    • 440: Select xcf128x [16 M] for Storage Device (Bytes)
    • Click Add Storage Device
    • Click green arrow
    • Ignore Checksum Fill Value
    • Enter Output File Name (e.g v4-dpm.mcs)
    • Select Output File Location
    • File Format: MCS
    • 405: Enable Revisioning: No
    • 405: Enable Compression: No
    • 440: Add Non-Configuration Data Files: No
    • Click OK
    • Pop-up: OK
    • Pop-up: Select .bit file: OK
    • Would you like to add another device to Revision: 0 : No
    • Pop-up: OK
    • 440: Multiboot blah, blah, blah: Cancel
    • Right click "Generate File..." (Deselect devices first by clicking on background)
  • There is no need to version control the .mcs file

Load to PROM device

  • Ensure the JTAG dongle is connected to your board
  • Verify the esn of the dongle
  • Log into the computer to which the dongle's USB cable is connected
  • Run iMPACT from the build/firmware/<project> directory
    • Load the project of interest or bail out of any pop-ups
    • Select Output -> Cable Setup...
    • Ensure the JTAG dongle with your esn is selected
    • Click OK
    • Select the Boundary Scan window
    • For 405s:
      • Right click on PROM device -> Assign New Configuration File
      • Select .mcs file -> Open
      • PROM device now has file name instead of 'bypass'
      • Right click on PROM device -> Program
    • For 440s:
      • Right click on FPGA device -> Add SPI/BPI Flash...
      • Select .mcs file -> Open
      • Select BPI PROM, XCF128X, Data Width: 16, Select RS[1:0]b Pin Address Bits: NOT USED, OK
      • Ignore iMPACT Warning by clicking OK
      • Right click on attached FLASH device -> Program
  • After completion, cycle board (or payload) power to reload the FPGA

Load to FPGA

  • This method of loading the FPGA is not persistent
  • Once the FPGA is loaded, the firmware persists until a power cycle
  • Using XMD, do: 
    stop
rst -processor
fpga -f <file> -debugdevice devicenr <N>
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