Overview
Acronyms
| Term | Description |
|---|---|
ATCA | Advanced Telecommunications Computing Architecture |
CPU | Central Processing Unit |
EPICS | Experimental Physics and Industrial Control System |
FPGA | Field Programmable Gate Array |
IOC | Input Output Controller |
RF | Radio Frequency |
SHM | Shelf Manager |
VCO | Voltage Controlled Oscillator |
Linac Locking System-Level Description
A high-level description of the linac locking system is captured in the page linked below:
Linac Locking - A System Level Overview
IOC Description
The phase locker IOC provides the controls to interface with the phase locker firmware. The latter takes at its inputs a VCO-controlled RF signal and an RF-reference signal of the same frequency. Subsequently, the computed phase error between the two signals is used to estimate a correction voltage, which in turn gets applied to the VCO to tune the VCO-generated signal. This is repeated until the two signals are locked together in phase within an acceptable margin.
Firmware Description
The diagram below sheds more light in the process outlined above.
In particular for the linac locking system (see diagram above), the RF reference and 2856MHz VCO signals are read in by the ADC and processed in parallel until their phases are extracted. The phase error between the two signals goes through a proportional-integral (PI) controller and low pass filter to get the phase compensation signal, which is then used to adjust the bias voltage applied to the 476MHz VCO. The VCO tuning range at 476MHz is about ±150Hz with respect to the ATCA baseband DAC, which has a ±5 Volts output range. With the loop bandwidth set to 300Hz, a stable phase locking is achieved with a 10 femtosecond differential timing jitter between the VCO signal and the RF reference signal.
IOC Deployment
In this section, IOC deployment details are provided pertaining to the App hosting the phase locker IOC, as well as the IOC name and the assigned CPUs in both Dev and Production.
IOC Repository
The IOC is housed by the masterSource App. The intended released tag in Production is R2.2.3.
| IOC App Name | App Version |
|---|---|
| masterSource | R2.2.3 |
Deployment In Production
The configuration used in Production is seen below.
| IOC Name | CPU Name |
|---|---|
| sioc-sys0-ms10 | cpu-sys0-sp02 |
Deployment In Dev
The configuration used in Dev is seen below. As of now, there is no designated test stand in Dev.
| IOC Name | CPU Name (Intended) |
|---|---|
| sioc-b084-ms10 | cpu-b084-sp12 |
IOC Packages
List of required packages and associated versions.
| Package Name | Package Version |
|---|---|
cpsw/framework | R4.4.1 |
yaml-cpp | yaml-cpp-0.5.3_boost-1.64.0 |
boost | 1.64.0 |
pcre | 8.37 |
mrllrf/llrfLib | R1.1.0 |
timing/hpsTpr | R2.3.0 |
atca/commonATCA | R1.3.1 |
IOC Modules
List of required modules and associated versions.
| Module Name | Module Version |
|---|---|
ATCACommon | R7.0.3.1-1.0 |
agilent53220A | R1.0.6 |
asyn | R4.39-1.0.1 |
autosave | R5.10-1.1.0 |
bkhAsyn | R0.4.6 |
caPutLog | R4.0-1.0.0 |
iocAdmin | R3.1.16-1.3.2 |
miscUtils | R2.2.5 |
modbus | R3.2-1.0.1 |
seq | R2.2.4-1.2 |
std | R3.2-1.0.5 |
streamdevice | R2.8.9-1.2.1 |
timingApi | R0.9 |
tprTrigger | R2.5.3-4.0-2 |
yamlLoader | R2.3.5 |
ycpswasyn | R3.3.6-1.0 |
IOC Bootup
In this section, a detailed description of the IOC bootup process is laid out.
Generic variable definition
First, define the usual environment variables in the startup script.
# ===========================================
# ENVIRONMENT VARIABLES
# ===========================================
epicsEnvSet("IOC", "sioc-sys0-ms10" )
epicsEnvSet("DEVICE", "PRL" )
epicsEnvSet("LOCA", "SYS0" )
epicsEnvSet("UNIT", "1" )
epicsEnvSet("IOC_NAME", "SIOC:$(LOCA):MS10" )
epicsEnvSet("IOC_PV", "$(DEVICE):$(LOCA):$(UNIT)")
epicsEnvSet("PREFIX", "$(IOC_PV)" )
epicsEnvSet("DATA", "$(IOC_DATA)/$(IOC)" )
epicsEnvSet("YAML_DIR", "$(DATA)/yaml" )
epicsEnvSet("FPGA_IP", "10.0.1.102" )
epicsEnvSet("EPICS_CA_MAX_ARRAY_BYTES", "1000000")
# Port name
epicsEnvSet("PORT","ATCA2")
Common setup
Load dbd and IOC health/monitoring records. Also, set up autosave and load the LCLS access configuration file. Finally, copy the archive file in $IOC_DATA to enable record archiving.
## Load dbd
dbLoadDatabase("dbd/masterSource.dbd", 0, 0)
masterSource_registerRecordDeviceDriver(pdbbase)
## Environment variables
epicsEnvSet("ENGINEER", "MICHAEL SKOUFIS")
epicsEnvSet("STREAM_PROTOCOL_PATH", "${TOP}/db")
## Tag log messages with IOC name
epicsEnvSet("EPICS_IOC_LOG_CLIENT_INET", "${IOC}")
## Load records
# **** Load iocAdmin databases to support IOC Health and monitoring ****
dbLoadRecords("db/iocAdminSoft.db", "IOC=${IOC_NAME}")
dbLoadRecords("db/iocAdminScanMon.db", "IOC=${IOC_NAME}")
dbLoadRecords("db/iocRelease.db", "IOC=${IOC_NAME}")
## Autosave initialization
< $(TOP)/iocBoot/common/autosave_init.cmd
## Channel Access Security:
# This is required if you use caPutLog.
# Set access security file
# Load common LCLS Access Configuration File
< ${ACF_INIT}
## Update archive pv list in ${IOC_DATA}
system("cp $(TOP)/archive/${IOC}.archive ${IOC_DATA}/${IOC}/archive/")
Autosave initialization
Tell the IOC where to find the list of record names and where they will be autosaved. Also, restore previously autosaved values.
# =====================================================================
# Load database for autosave status
# =====================================================================
dbLoadRecords("db/save_restoreStatus.db", "P=${IOC_NAME}:")
# ============================================================
# If all PVs don't connect continue anyway
# ============================================================
save_restoreSet_IncompleteSetsOk(1)
# ============================================================
# created save/restore backup files with date string
# useful for recovery.
# ============================================================
save_restoreSet_DatedBackupFiles(1)
# ============================================================
# Where to find the list of PVs to save
# ============================================================
set_requestfile_path("${IOC_DATA}/${IOC}/autosave-req")
# ============================================================
# Where to write the save files that will be used to restore
# ============================================================
set_savefile_path("${IOC_DATA}/${IOC}/autosave")
# ============================================================
# Prefix that is use to update save/restore status database
# records
# ============================================================
save_restoreSet_status_prefix("${IOC_NAME}:")
## Restore datasets
set_pass0_restoreFile("info_positions.sav")
set_pass1_restoreFile("info_positions.sav")
set_pass0_restoreFile("info_settings.sav")
set_pass1_restoreFile("info_settings.sav")
Besides the auto-generated record names for autosave, copy the manually generated list of records to be autosaved and restore their previously autosaved values.
# Copy over the manual settings request file
system("cp $(TOP)/autosave/${IOC}.req ${IOC_DATA}/${IOC}/autosave-req/")
# Load manual settings from autosave
set_pass0_restoreFile("${IOC}.sav")
set_pass1_restoreFile("${IOC}.sav")
Yaml initialization
Load the YAML hierarchy and register configuration.
# Load FPGA hierarchy and register map from YAML files.
cpswLoadYamlFile("$(YAML_DIR)/000TopLevel.yaml", "NetIODev", "", "$(FPGA_IP)")
# Load FPGA configuration/initialization from a YAML file
cpswLoadConfigFile("$(YAML_DIR)/config/defaultsGenRTMV2.yaml", "mmio", "")
# Yaml File
epicsEnvSet("YAML_FILE", "$(YAML_DIR)/000TopLevel.yaml")
Database loading
Load the phase locker records.
# ===========================================
# DB LOADING
# ===========================================
dbLoadRecords("db/phaseLocker.db", "P=${PREFIX}, PORT=${PORT}")
dbLoadRecords("db/subR_phaseLocker.db", "P=${PREFIX}")
Asyn driver configuration
Create the ycpswAsynDriver with a dictionary option, i.e. use a limited number of interfaces to the FPGA registers.
# ===========================================
# DRIVER SETUP
# ===========================================
# Use Automatic generation of records from the YAML definition
# 0 = No, 1 = Yes
epicsEnvSet("AUTO_GEN", 0)
# Dictionary file for manual (empty string if none)
epicsEnvSet("DICT_FILE", "phaseLocker.dict")
YCPSWASYNConfig("${PORT}", "", "${PREFIX}", "${AUTO_GEN}", "$(YAML_DIR)/${DICT_FILE}", "")
asynSetTraceMask("${PORT}",, -1, 0)
Archiver list
A complete list of the records to archive is provided below.
(base) skoufis@aird-b50-srv01 (master) $ cat archive/sioc-sys0-ms10.archive # # syntax <PVNAME> <POLL_SEC> <MONITOR option> # PRL:SYS0:1:A 1 monitor # PRL:SYS0:1:LO_PLL_PHAS 5 monitor PRL:SYS0:1:LO_PLL_AMP 5 monitor PRL:SYS0:1:LO_PLL_LOCKED 5 monitor PRL:SYS0:1:CLK_PLL_PHAS 5 monitor PRL:SYS0:1:CLK_PLL_AMP 5 monitor PRL:SYS0:1:CLK_PLL_LOCKED 5 monitor PRL:SYS0:1:STATUS13 5 monitor PRL:SYS0:1:STATUS14 5 monitor PRL:SYS0:1:STATUS15 5 monitor PRL:SYS0:1:STATUS16 5 monitor PRL:SYS0:1:STATUS17 5 monitor PRL:SYS0:1:STATUS18 5 monitor PRL:SYS0:1:STATUS19 5 monitor PRL:SYS0:1:RX_LINK_UP 5 monitor PRL:SYS0:1:LO_CTRL_RBV 5 monitor PRL:SYS0:1:CLK_CTRL_RBV 5 monitor PRL:SYS0:1:MON_CTRL_RBV 5 monitor PRL:SYS0:1:MUX4_RBV 5 monitor PRL:SYS0:1:MUX5_RBV 5 monitor PRL:SYS0:1:MUX6_RBV 5 monitor PRL:SYS0:1:MUX7_RBV 5 monitor PRL:SYS0:1:CLK_PLL_REF_SEL_RBV 5 monitor PRL:SYS0:1:LO_PLL_KP_RBV 5 monitor PRL:SYS0:1:LO_PLL_KP_RBV 5 monitor PRL:SYS0:1:CLK_PLL_KP_RBV 5 monitor PRL:SYS0:1:CLK_PLL_KI_RBV 5 monitor PRL:SYS0:1:AD_PLL_KI_RBV 5 monitor PRL:SYS0:1:AD_PLL_KP_RBV 5 monitor PRL:SYS0:1:LO_PLL_REF_SEL_RBV 5 monitor PRL:SYS0:1:CMD_REG_RBV 5 monitor PRL:SYS0:1:PHAS_SETPT_RBV 5 monitor PRL:SYS0:1:PHAS_SHFT_REQ_RBV 5 monitor PRL:SYS0:1:MAX_PHAS_STEP_RBV 5 monitor PRL:SYS0:1:VCO_KP_RBV 5 monitor PRL:SYS0:1:VCO_KI_RBV 5 monitor PRL:SYS0:1:VCO_DISABLE_RBV 5 monitor PRL:SYS0:1:VCO_POLE_RBV 5 monitor PRL:SYS0:1:VCO_SETPT_RBV 5 monitor PRL:SYS0:1:RFDAC_KP_RBV 5 monitor PRL:SYS0:1:RFDAC_KI_RBV 5 monitor PRL:SYS0:1:RFDAC_POLE_RBV 5 monitor PRL:SYS0:1:DC:ATTN0_RBV 5 monitor PRL:SYS0:1:DC:ATTN1_RBV 5 monitor PRL:SYS0:1:DC:ATTN2_RBV 5 monitor PRL:SYS0:1:DC:ATTN3_RBV 5 monitor PRL:SYS0:1:DC:ATTN4_RBV 5 monitor PRL:SYS0:1:DC:ATTN5_RBV 5 monitor PRL:SYS0:1:UC:ATTN0_RBV 5 monitor PRL:SYS0:1:UC:ATTN1_RBV 5 monitor PRL:SYS0:1:UC:ATTN2_RBV 5 monitor PRL:SYS0:1:UC:ATTN3_RBV 5 monitor PRL:SYS0:1:OUTPUT_ENABLE 5 monitor PRL:SYS0:1:OUTPUT_CONFIG_RBV 5 monitor PRL:SYS0:1:OUTPUT_CONFIG 5 monitor PRL:SYS0:1:OUTPUT_ENABLE_RBV 5 monitor PRL:SYS0:1:LO_CTRL 5 monitor PRL:SYS0:1:CLK_CTRL 5 monitor PRL:SYS0:1:MON_CTRL 5 monitor PRL:SYS0:1:MUX4 5 monitor PRL:SYS0:1:MUX5 5 monitor PRL:SYS0:1:MUX6 5 monitor PRL:SYS0:1:MUX7 5 monitor PRL:SYS0:1:CLK_PLL_REF_SEL 5 monitor PRL:SYS0:1:LO_PLL_KP 5 monitor PRL:SYS0:1:LO_PLL_KP 5 monitor PRL:SYS0:1:CLK_PLL_KP 5 monitor PRL:SYS0:1:CLK_PLL_KI 5 monitor PRL:SYS0:1:AD_PLL_KI 5 monitor PRL:SYS0:1:AD_PLL_KP 5 monitor PRL:SYS0:1:LO_PLL_REF_SEL 5 monitor PRL:SYS0:1:CMD_REG 5 monitor PRL:SYS0:1:PHAS_SETPT 5 monitor PRL:SYS0:1:PHAS_SHFT_REQ 5 monitor PRL:SYS0:1:MAX_PHAS_STEP 5 monitor PRL:SYS0:1:VCO_KP 5 monitor PRL:SYS0:1:VCO_KI 5 monitor PRL:SYS0:1:VCO_DISABLE 5 monitor PRL:SYS0:1:VCO_POLE 5 monitor PRL:SYS0:1:VCO_SETPT 5 monitor PRL:SYS0:1:RFDAC_KP 5 monitor PRL:SYS0:1:RFDAC_KI 5 monitor PRL:SYS0:1:RFDAC_POLE 5 monitor PRL:SYS0:1:DC:ATTN0 5 monitor PRL:SYS0:1:DC:ATTN1 5 monitor PRL:SYS0:1:DC:ATTN2 5 monitor PRL:SYS0:1:DC:ATTN3 5 monitor PRL:SYS0:1:DC:ATTN4 5 monitor PRL:SYS0:1:DC:ATTN5 5 monitor PRL:SYS0:1:UC:ATTN0 5 monitor PRL:SYS0:1:UC:ATTN1 5 monitor PRL:SYS0:1:UC:ATTN2 5 monitor PRL:SYS0:1:UC:ATTN3 5 monitor PRL:SYS0:1:LO_PLL_AMP:CONV 5 monitor PRL:SYS0:1:LO_PLL_PHAS:CONV 5 monitor PRL:SYS0:1:LO_PLL_LOCKED:CONV 5 monitor PRL:SYS0:1:CLK_PLL_PHAS:CONV 5 monitor PRL:SYS0:1:CLK_PLL_AMP:CONV 5 monitor PRL:SYS0:1:CLK_PLL_LOCKED:CONV 5 monitor PRL:SYS0:1:STATUS13:CONV 5 monitor PRL:SYS0:1:STATUS14:CONV 5 monitor PRL:SYS0:1:STATUS15:CONV 5 monitor PRL:SYS0:1:STATUS16:CONV 5 monitor PRL:SYS0:1:STATUS17:CONV 5 monitor PRL:SYS0:1:STATUS18:CONV 5 monitor PRL:SYS0:1:STATUS19:CONV 5 monitor
IOC initialization
Initialize the IOC and logging capability.
# ===========================================
# IOC INIT
# ===========================================
iocInit()
# ===========================================
# CAPUTLOG
# ===========================================
# Turn on caPutLogging:
# Log values only on change to the iocLogServer:
caPutLogInit("${EPICS_CA_PUT_LOG_ADDR}")
caPutLogShow(2)
Autosave start
Start the autosave process.
# ===========================================
# AUTOSAVE START
# ===========================================
# Autosave start
< $(TOP)/iocBoot/common/autosave_start.cmd
create_monitor_set("${IOC}.req", 5, "")
EPICS Records
A complete list of the phase locker IOC Process Variables (PVs) can be found in the page linked below, along with revision dates based on feedback received from the naming team.
Linac Locking - Phase Locker IOC PVs [sioc-sys0-ms10]
Displays
Currently, there is no phase locker test stand in Dev and hence only the Production display is available.
Production
To access and launch the display in Production, follow the steps outlined below.
[softegr@lcls-srv01 skoufis]$ cd $EPICS_IOCS/sioc-sys0-ms10/iocSpecificRelease/masterSourceApp/srcDisplay/ [softegr@lcls-srv01 skoufis]$ cat masterSourceApp/srcDisplay/README.phaselocker To run the phase locker screen in production, follow these steps from within this directory: 1. $ source /usr/local/lcls/epics/setup/epicsenv-7.0.3.1-1.0.bash 2. $ source /usr/local/lcls/tools/script/ENVS64.bash 3. $ pydm -m "PREFIX=PRL:SYS0:1" plocker.ui
The phase locker screen is an engineering screen intended to be used by the firmware engineer for tuning until a locked state is achieved.
Register Configuration For Locked State
The registers have been tuned to achieve a lock in Production. See below the display with the selected values. These values are also captured by autosave.
Deliverables
The released software will be made available in the main IOC release area post-deployment (Dev: /afs/slac/g/lcls/epics/iocTop/masterSource/, Production:/usr/local/lcls/epics/iocTop/masterSource/). See below for the specific repositories and tags.
Software Release
See software release details below.
| Repository | Version | IOC Name |
|---|---|---|
| masterSource | R2.2.3 | sioc-sys0-ms10 |
Firmware Release
See firmware release details below.
| Repository | URL | Version |
|---|---|---|
| FlintLaserLocker | https://github.com/slaclab/lcls-mr-llrf/tree/main/firmware/targets/FlintLaserLocker_AmcUpConvtGen2 | Gen2 |
References
Overview
Content Tools