Term | Description |
---|---|
AC | Alternate Current |
ATCA | Advanced Telecommunications Computing Architecture |
CPU | Central Processing Unit |
EPICS | Experimental Physics and Industrial Control System |
FPGA | Field Programmable Gate Array |
IOC | Input Output Controller |
LCLS | Linac Coherent Light Source |
MDL | Main Drive Line |
MO | Master Oscillator |
NC | Normal-Conducting |
RF | Radio Frequency |
SC | Super-Conducting |
SHM | Shelf Manager |
VMTG | VME-based Master Trigger Generator |
The main objective is to be able to use subsystems built for the LCLS-I reference frequencies with the LCLS-II beam. The beneficiaries include XTCAV, STCAV and possibly others. In order to do that, the 476MHz Master Oscillator (MO) signal for LCLS-I should be replaced with another 476MHz source locked to the LCLS-II Master Oscillator operating at 162.5MHz.
The 476MHz MO provides an RF source to the timing system. This signal is combined with a 360Hz signal derived from the a sequencer chassis (i.e. derives a 360Hz signal coincident with the zero crossings from the 3-phase AC power line). The 476MHz and the 360Hz signals are routed to the inputs of the VME-based Master Trigger Generator (VMTG). The VMTG output is thus synchronized with the 476MHz MO --via a 71kHz RF signal-- and it triggers the fiducial generator at 360Hz. The 360Hz output of the fiducial generator is amplitude-modulated onto the original 476MHz signal (hence 2.78ms between peaks and with a 476MHz frequency) and is propagated down the Main Drive Line (MDL).
(Borrowed from Timing for LCLS slide deck - see References section below)
Timing for LCLS
Linac Locking Review