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Toroid Electronics Meeting Minutes
May 24, 2006
Concept Design Review
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Contents
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Attendees:
Steve Smith |
Mike Browne |
Dave Dowell |
Hamid Shoaee |
Bob Simmons |
Stephen Norum |
Michael Cecere |
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Agenda:
- System Architecture
- Board Architecture
- Timing and Flowcharts
- Project Timeline
Presentation Materials:
CDR Presentation, M. Cecere
(PPT Format)
Toroid Charge Monitor Timeline, M. Cecere
( Project Format)
Minutes:
- Presented MicroController based design
- Discussed Analog Integrator Technique
- Dual Integrators twice as long to calibrate, change design for single integrator, staged sampling of output
- Bring in baseline and pulse signals for subtraction into PIC
- No need to bring Vcomp signal into IOC ADC
- Network reprogrammability would be very useful for configuration management. (could be done with jumpers, prog header...)
- Program which toroids to compare.
- Program which toroid channels, comp channels are enabled
- Program MPS signalling thresholds Enable/Disable?
- How to trigger IOC/MPS that data is ready?
- Need digital input to IOC to signal data ready on Vcharge analog lines
- Need/How to signal MPS that data has been updated?
- need watchdog timer on EVR trigger arrival?
- Since Beam CAN be run in Single-Shot mode, determining a missing trigger is tricky
- Faraday Cup accuracy ~10-15%
- Question to Tim M., when is first articles rom ISA?
- Need a Test Plan for this project
Action Items:
- M. Cecere: Need ICD and Test Plan
- M. Cecere: When is first article from ISA due?
- M. Cecere: Check with Ron Akre on his boards' availability
- M. Cecere: Determine handshaking scheme for IOC and MPS
- M. Cecere: Redraw integrators with one integrator, 2 S/Hs
- M. Cecere: Add Mechnical Box design to timeline
- M. Cecere: Add fast digitizer coding, and coder, to timeline