The Core logic is shared with the TXI 2M camera.
| Module | Description | Simulation | Test in hardware |
|---|---|---|---|
| RegisterControlDualClock | |||
| TrigControlAxi | |||
| AXiStreamRepeater | |||
| DigitalAsicStreamAxiV2 | |||
| AxiStreamBatcherEventBuilder | |||
| AxiLiteSaciMaster | |||
| AppClk | |||
| AppDeser | |||
| PwrCtrl | |||
| DAC - Max5443 | |||
| DAC - DacWaveformGenAxi | |||
| AdcMon | |||
| TimingRx | |||
| Chip scope pro | |||
| SI5345 Jitter cleaner | |||
| PROM | |||
| JTAG | |||
| Clock splitter | |||
| ASIC lanes |
Overview
Content Tools