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SVT EPICS Power Instructions

DAQ & Power Mapping in Group C

Operation

!!! Remember to make sure the detector is being cooled. !!!

!!! Remember to make sure the interlocks are in the state you want them. !!!

Remote control of hardware

Interlock board: see Group C interlock board for instructions on monitoring and controls.

Serial portserver (Digi Portserver TS 4): 192.168.1.217 on LAN. Telnet from ppa-pc91245, e.g. "telnet 192.168.1.217 2001" will connect you to port 2001. All serial ports are logged to /var/log/portserver on ppa-pc91245. Configure the portserver using its web interface or Telnet. Docs: http://www.digi.com/support/productdetail?pid=1954

PortTelnet portHardwareUseful for
12001BK 1697 power supply, powering interlock boardresetting interlock board: SOUT000 to turn on, SOUT001 to turn off
22002  
32003  
42004  

 

Basic instructions to take a pedestal run with CODA

To be added.

 

 

Miscellaneous

Reloading PGP card drivers

Typically after a reboot we need to reload the pgp card driver. 

$ cd /u1/pgpcard/software/driver_old/

$ ./pgpcard_load






 

OLD:Take a calibration run with expert SVT GUI

 

Start the DAQ:

 

$ cd /u1/software/software_new

 

$ source setup_env.csh

 

$ ./bin/frontEndTestGui

 

Click <read status> and make sure no error is seen. If so, check that the FEB is powered correctly.

 

Make sure the AxiXadc temperature is ok (50-60C).

 

Configure with config/FrontEndBoardConfigC01.xml

 

Click <read status> and check that more registers are found.

 

Turn on power to hybrids (see below)

 

Do a hard reset under commands/FebCore/HybridHardReset (current on AVDDP should drop ~100mA).

 

Click <Write config>.

 

Do a soft reset under commands/FebCore/HybridSoftReset.

 

Check that the hybrid currents measured are ok. Sync status for each channel can be seen in register RceCore/DataPath[x]/Synced, 1xf for powered channels.

 

Test Run SVT Group C Setup

 

Group C SVT test setup

 


 

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