- General example
- Question: Place it hear and hopefully some one will answer after...
- See this link for details about this question...
- Setup:
- DET_BIAS RELATED:
- Answer place answer in this link: PCB Carrier BRD
- Question: What is the typical reverse bias voltage (DET_BIAS) on the substrate?
- Question: DET_BIAS can change where the common-mode of the pixel is, is this in a good location?
- Testing:
- Back-Plane Pulsing
- To answers to the following questions: See Back-Plane Pulsing Q&A section
- (Q) What is the amplitude of the voltage pulse required to emulate beam-line?
- (Q) How much charge do we expect tripping to happen at?
- Beamline Pulse duration?
- (Q) What is typical bias voltage applied on Detector Bias line to reverse bias the substrate?
- (Q) At this bias or some known bias voltage what is the expected substrate capacitance for a single asic entire sensor (there are asic 4 in parallel)?
- (Q) When the beam hits the substrate, which way does the current flow (in/out of pixel front-end) or (assuming substrate is negatively biased) that the current being drawn from the pixel front-end is less/more negative when a pulse hits (positive/negative voltage pulse)?
- (Q) What is the capacitance vs. bias curve of substrate?
- ...
- Power-Supply Startup-Sequence
- To answers to the following questions: See Power-Supply Startup-Sequence--Smalls Q&A section
- Cabling
- (Q) Power and pin requirements met the DC requirement?
- (Q) Power and pin requirements met the transient response time?
- Mystery Resistor?
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