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The DaqMux can perform the following functionalities

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Stream packets can be acquired continuously every time a trigger arrives in continuous mode, or only once upon trigger with or without header (meta data) in trigger mode, or many times with or without header (meta data) in trigger mode when auto re-arm is enabled
Possibility of cascading trigger of DaqMux blocks in case streams from several DaqMuxes acquired at the same instant is required
Pause streaming by not overwriting buffers (freeze functionality), therefore nothing is forwarded to software
Down sampling and averaging

Stream : a group of bytes transmitted in sequence.
Lane : a physical bus at which the stream crosses
Packet : User abstraction. Bunches of bytes that the user wants forward to software from each lane every time there is a trigger
AXI transaction : Hardware abstraction. Packets are broken into a 1 or more AXI transactions

Figure 1 shows the DaqMux instantiated in the Common platform firmware in the application side.

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	Figure1
	Figure1

Figure 1: Common platform firmware top-level

Generics & IO description

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Table 1: DaqMux generics list and description

Generic name	default value	Description
TPD_G	1	Simulation variable; register clock to output delay in nanoseconds
DECIMATOR_EN_G	True	Decimator enable
WAVEFORM_TDATA_BYTES_G	4	Output lane width in bytes
FRAME_BWIDTH_G	10	Power of two, which defines AXI stream transaction size in words (4 bytes)(i.e. when FRAME_BWIDTH_G = 12 → 2¹⁰ x 4 = 4096 bytes)
BAY_INDEX_G	-	Index of the DaqMux
N_DATA_IN_G	16	Number of input data lanes
N_DATA_OUT_G	4	Number of output data lanes

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