2019/03/22 0V bias baseline configuration:

2019/03/22 50V bias:

 

2019/03/22
L0M09 half module. Pinhole channels have been pulled

High Voltage Test
V/D:I/D
(V) (uA)
50 00.86
100 0.90
200 0.96
300 1.07
386 20.08

Low Votlage Test

Pre-Config
V/D:I/D
(V) (A)
AVDD: 2.50 0.107
DVDD: 2.50 0.239
V125: 1.50 0.000

Post-Config
V/D:I/D
(V) (A)
AVDD: 2.50 0.309
DVDD: 2.50 0.245
V125: 1.25 0.224

Dead Channel Table
Sector B Sector A
pCH | apvCH | 128+apvCH | 2*128-apvCH-1| 128-apvCH-1
APV0
0 | 0 | 128 | 255 | 127
31 | 31 | 159 | 224 | 96
49 | 49 | 177 | 206 | 78
86 | 86 | 214 | 169 | 41
123 | 123 | 251 | 132 | 4
125 | 125 | 253 | 130 | 2
APV1
APV2
279 | 23 | 151 | 232 | 104
284 | 28 | 156 | 227 | 99
313 | 57 | 185 | 198 | 70
324 | 68 | 196 | 187 | 59
339 | 83 | 211 | 172 | 44
APV3
390 | 6 | 134 | 249 | 121
414 | 30 | 158 | 225 | 97
459 | 75 | 203 | 180 | 52
495 | 111 | 239 | 144 | 16
511 | 127 | 255 | 128 | 0
Nlow: 16

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