20190412
L0M03 half module with pinholes pulled

High Voltage Test
(V) (uA)
V:D/I:D
100 0.91
200 1.11
300 1.73
386 20.08

Low Voltage Test
(V) (A)
V:D/I:D
Pre-Config:
AVDD: 2.50 0.106
DVDD: 2.50 0.241
V125: 1.25 0.000

Post-Config:
AVDD: 2.50 0.311
DVDD: 2.50 0.245
V125: 1.25 0.230

Bad Channels Table
Sector B Sector A
pCH | apvCH | 128+apvCH | 2*128-apvCH-1| 128-apvCH-1
APV0
0 | 0 | 128 | 255 | 127
24 | 24 | 152 | 231 | 103
65 | 65 | 193 | 190 | 62
APV1
APV2
301 | 45 | 173 | 210 | 82
368 | 112 | 240 | 143 | 15
APV3
389 | 5 | 133 | 250 | 122
511 | 127 | 255 | 128 | 0
Nlow: 7

 Baseline Configuration at 0V Bias, sumFitNoise:

Baseline Configuration at icalScan 45 at 50V bias:

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