Overview 

Pictures of Connected Components: 

RD53A Single Chip Card

Power Supply with Output 1 set to 1.8V

ZCU102 

miniDP connection on YARR PC

Hardware Info

SLAC FMCv3: https://confluence.slac.stanford.edu/display/AIRTRACK/PC_256_101_00_C03

FMC pin mapping: (LA[33:30] is not used by the FMC adaptor)




General Setup 

Preparing an SD card for ZCU102

https://twiki.cern.ch/twiki/bin/viewauth/Atlas/RCEGen3SDK

Download RCE DAQ Package

This package includes rd53a scan Software, FPGA Firmware, and RCE driver

RCE_ScanConsole_2021_06_30_00_06_23.tar.gz

untar it, and follow the install guide. 

WARNING! Please backup your old working folder and files before installing new folder/files

Reboot ZCU102 after you update the FPGA firmware and RCE driver


Compiling YARR Software for RCE DAQ

### RCE Guide
- for ARM target cross compilers are provided by the RCE_SDK
    - installtion instructions: https://twiki.cern.ch/twiki/bin/viewauth/Atlas/RCEGen3SDK
- using CMake:
    - ``$ source /opt/rce/setup.sh (for RCE cross compilation setup)``
    - ``$ export CENTOS7_ARM32_ROOT=/opt/rce/rootfs/centos7 #(points to cross installed CentOS7)``
    - ``$ export CENTOS7_ARM64_ROOT=/opt/rce/rootfs/centos7_64 #for ZCU102 ``
    - ``$ git clone --single-branch --branch devel_rogue_fastMultichip_master_v1p2p2 https://gitlab.cern.ch/YARR/YARR.git Yarr``
    - ``$ cd Yarr``
    - ``$ mkdir build``
    - ``$ cd build``
    - select one of the supported toolchains
        - ``$ cmake3 .. -DYARR_CONTROLLERS_TO_BUILD="Spec;Emu;Rogue" -DCMAKE_TOOLCHAIN_FILE=../cmake/linux-clang # requires clang installed on Linux ``
        - ``$ cmake3 .. -DYARR_CONTROLLERS_TO_BUILD="Spec;Emu;Rogue" -DCMAKE_TOOLCHAIN_FILE=../cmake/linux-gcc # gcc 7.3 or higher ``
        - ``$ cmake3 .. -DYARR_CONTROLLERS_TO_BUILD="Spec;Emu;Rogue" -DCMAKE_TOOLCHAIN_FILE=../cmake/rce-arm32 # ARM32/Centos7 on RCE ``
        - ``$ cmake3 .. -DYARR_CONTROLLERS_TO_BUILD="Spec;Emu;Rogue" -DCMAKE_TOOLCHAIN_FILE=../cmake/rce-arm64 # ARM64/Centos7 on zcu102 ``
    - ``$ make -j8 install ``


Run YARR SW in RCE DAQ

- Run YARR SW in ZCU102
    - copy bin/scanConsole to ZCU102
    - copy configs folder to ZCU102
    - run scanConsole for single digital scan: ``./scanConsole  -r configs/controller/ZCU102_rogueCfg.json -c configs/connectivity/example_rd53a_setup.json  -s configs/scans/rd53a/std_digitalscan.json -p``
    - ``scripts/fast_tune-rd53a.sh`` to tune Rd53a Syn+Diff+Lin FE

    - Multi-Scan Console is another convinient tool to run a list of scan
        - run scanConsole for multi-digital scan in fast mode(without plotting, without save FE cfg file): ``./bin/multiScanConsole  -r  configs/controller/ZCU102_lpGBTEmu_rogueCfg.json -c configs/connectivity/example_rd53a_lpGBTEmu_SCC_setup.json -l  configs/scans/rd53a/linkScan_scanList.json -f``
        - Tuning for Rd53a Syn+Diff+Lin FE: ``./bin/multiScanConsole -r configs/controller/ZCU102_rogueCfg.json -c configs/connectivity/example_rd53a_setup.json -S configs/scans/rd53a/tune_scanList.json -p``
        - Tuning for Rd53a Diff+Lin FE: ``./bin/multiScanConsole  -r configs/controller/ZCU102_rogueCfg.json -c configs/connectivity/example_rd53a_setup.json  -S  configs/scans/rd53a/tune_scanList_noSync.json -p``

    - Running link Data Transmission Scan: ``python runLinkScan.py``

- Run YARR SW in HSIO2+KCU105
    - copy bin/scanConsole to HSIO2
    - copy configs folder to HSIO2
    - run scanConsole: ``./scanConsole  -r configs/controller/HSIO2_KCU105_rogueCfg.json -c configs/connectivity/example_rd53a_setup.json  -s configs/scans/rd53a/std_digitalscan.json -p``

Useful IP Addresses

If you can not find your machine here, open up the file /etc/hosts on rddev111 for a full list. 

RCE DAQ access

Board NameIPLocation
ZCU102192.168.4.31

B84, room B231 (lab C)

ZCU102, 

zcu102_1.atlas.lab

192.168.4.32B84, room B282 (student office)



Power Supply access for Rd53a

Power Supply NameIPLocation
Agilent 192.168.4.7B84, room B231 (lab C)
Agilent, 

agilent01.atlas.lab

192.168.4.201B84, room B282 (student office)

ATCA crate

ATCA NameIPLocationaccess
6-Slot ASIS192.168.4.2B84, room B231 (lab C)root/NA
2-Slot ASIS192.168.4.210B84, room B231 (lab C)root/NA



ITkTest Box For YARR Comparisons

NameIPLocation
ITkTestBox

192.168.4.252

B84, room B282 (student office)

Appendix


Install Pixel Scan Software, FPGA Firmware, and driver Package

As a reference, you could also get the rd53a scan Software, FPGA Firmware, and driver Package by yourself

(outdated) Update to a special version of aes driver for ZCU102

https://github.com/zixu/aes-stream-drivers/tree/master_v5p14p3_reduced_ProcInfo_for_fastMonitoring

(Will change to the official aes driver once it got the monitoring features we need)

(outdated) Update the Firmware for ZCU102

Releases · slaclab/atlas-rd53-fmc-dev · GitHub

saving https://github.com/slaclab/atlas-rd53-fmc-dev/releases/download/v5.0.0/AtlasRd53FmcXilinxZcu102-0x05000000-20210211153441-ruckman-e5d2d30.bin to ZCU102 as /mnt/boot/fpga.bin

reboot ZCU102

(outdated) YARR software for RCE DAQ

Files · devel_rogue_fast_multichip · YARR / YARR · GitLab (cern.ch)

git clone the YARR Software to rddev111. Compile it. and copy it to ZCU102 using script: scripts/compile_copy_RCE.sh

==================================================================


UART log into ZCU102 from Windows or Linux

details:

https://twiki.cern.ch/twiki/pub/Atlas/RCEGen3SDK/UART_for_ZCU102.pdf

For example, linux could use minicom app to log into ZCU102 with configuration:


IBERT for ZCU102

https://www.xilinx.com/support/documentation-navigation/design-hubs/dh0036-zynq-ultrascale-plus-mpsoc-hub.html

https://www.xilinx.com/support/documentation/boards_and_kits/zcu102/2018_2/xtp430-zcu102-ibert-c-2018-2.pdf 

xtp430-zcu102-ibert-c-2018-2.pdf


Rd53a Pixel Calibration Software Update Log

June 30, 2021:

RCE_ScanConsole_2021_06_30_00_06_23.tar.gz

Update List:

1) disable firmware GlobalPulse during chip configuration.  

a) enabling firmware GlobalPulse during chip configuration will disturbing the chip config. Chip randomly failed during chip config

2) Improving the plotting control. 

a) "-p" to enable plotting

b) "-P" to enable ploting while Occupancy map error detected during digital/analog scan (need to enable error detector in digital/analog scan configuration)

c) "-P" was used for "port" assignment. Now, change to "-O" for port


June 22, 2021:

RCE_ScanConsole_2021_06_22_01_08_18.tar.gz

Update List:

1) add GlobalPulse to firmware. and the frequency is configurable;

2) add "enable/disable Rx" switch to firmware to improve the analog scan performance. So, no need for long sleeping time after ECR. 



Mar 8, 2022:

sync with YARR SW master branch 1.3.1

new branch: https://gitlab.cern.ch/YARR/YARR/-/tree/master_v1p3p1_rogue

YARR_Mar8_2022.tar.gz


Mar 14, 2022:

fixed the bugs for multiple chip running

new branch: https://gitlab.cern.ch/YARR/YARR/-/tree/master_v1p3p1_rogue

YARR_Mar14_2022.tar.gz


Mar 21, 2022:

improved for data transmission test, and has the rceRd53aScanConsole and rceRd53aMultiScanConsole

YARR_Mar21_2022.tar.gz





  • No labels