← Screen shots typed out bellow
Register Loc | LCLS | ||||||
---|---|---|---|---|---|---|---|
# | ASIC | FPGA | Name | Base | Range......... | Default... | Change |
1 | Version | 0 | |||||
2 | DigitalCardId0 | 0 | |||||
3 | DigitalCardId1 | 0 | |||||
4 | AnalogCardId0 | 0 | |||||
5 | AnalogCardId1 | 0 | |||||
6 | CarrierId0 | 0 | |||||
7 | CarrierId1 | 0 | |||||
8 | BaseClockFrequency | 0 | |||||
9 | FirmwareHash | ? | |||||
10 | FirmwareDesc | ? | |||||
11 | EvrRunCode | 10 | 0→(2^8)-1 | 40 | |||
12 | EvrDaqCode | 10 | 0→(2^8)-1 | 40 | |||
13 | EvrRunTrigDelay | 10 | 0→(2^31)-1 | 18223 | |||
14 | NumberOfAsicsPerRow | 10 | 2→2 | 2 | |||
15 | NumberOfAsicsPerColumn | 10 | 2→2 | 2 | |||
16 | NumberOfRowsPerAsic | 10 | 176→176 | 176 | |||
17 | NumberOfReadableRowsPerAsic | 10 | 0→176 | 176 | |||
18 | NumberOfPixelsPerAsicRow | 10 | 192→192 | 192 | |||
19 | CalibrationRowCountPerASIC | 10 | 2→2 | 2 | |||
20 | EnvironmentalRowCountPerASIC | 10 | 1→1 | 1 | |||
21 | ASICs | - | - | - | - | ||
22 | Pixel Map | - | - | - | - | ||
23 | Calib Map | - | - | - | - | ||
--------------------------------- LEFT BLANK ------------------------------------------------- | |||||||
24 | Y | EpixRunTrigDelay | 10 | 0→(2^31)-1 | 64000 | ||
25 | Y | EpixDaqTrigDelay | 10 | 0→(2^31)-1 | 64000 | ||
26 | Y | DacSettings | hex | 0x0→0xffff | 0 | ||
27 | Y | asicGR | bool | 0→1 | 0 | ||
28 | Y | asicGRControl | bool | 0→1 | 0 | ||
29 | Y | asicAcq | bool | 0→1 | 0 | ||
30 | Y | asicAcqControl | bool | 0→1 | 0 | ||
31 | Y | asicR0 | bool | 0→1 | 0 | ||
32 | Y | asicR0Control | bool | 0→1 | 0 | ||
33 | Y | asicPpmat | bool | 0→1 | 1 | ||
34 | Y | asicPpmatControl | bool | 0→1 | 1 | ||
35 | Y | asicPpbe | bool | 0→1 | 0 | ||
36 | Y | asicPpbeControl | bool | 0→1 | 0 | ||
37 | Y | asicRoClk | bool | 0→1 | 0 | ||
38 | Y | asicRoClkControl | bool | 0→1 | 0 | ||
--------------------------------- LEFT BLANK ------------------------------------------------- | |||||||
39 | Y | adcStreamMode | bool | 0→1 | 0 | ||
40 | Y | testPatternEnable | bool | 0→1 | 0 | ||
41 | Y | AcqToAsicR0Delay | 10 | 0→(2^31)-1 | 18223 | ||
42 | Y | AsicR0ToAsicAcq | 10 | 0→(2^31)-1 | 12969 | ||
43 | Y | AsicAcqWidth | 10 | 0→(2^31)-1 | 12969 | ||
44 | Y | AsicAcqLToPPmatL | 10 | 0→(2^31)-1 | 259 | ||
45 | Y | AsicPPmatToReadout | 10 | 0→(2^31)-1 | 0 | ||
46 | Y | AsicRoClkHalfT | 10 | 0→(2^31)-1 | 5 | ||
47 | Y | AdcClkHalfT | 10 | 1→400 | 1 | ||
48 | Y | AsicR0Width | 10 | 0→(2^31)-1 | 39 | ||
49 | Y | AdcPipelineDelay0 | 10 | 0→(2^31)-1 | 31 | ||
50 | Y | AdcPipelineDelay1 | 10 | 0→(2^31)-1 | 31 | ||
51 | Y | AdcPipelineDelay2 | 10 | 0→(2^31)-1 | 31 | ||
52 | Y | AdcPipelineDelay3 | 10 | 0→(2^31)-1 | 31 | ||
--------------------------------- LEFT BLANK ------------------------------------------------- | |||||||
53 | Y | AsicMask | hex | 0x0→0xf | f | ||
54 | Y | EnableAutomaticRunTrigger | bool | 0→1 | 0 | ||
55 | Y | NumbClockTicksPerRunTrigger | 10??? | - | 833,333 | ||
56 | Y | ChostCorrEn | bool | 0→1 | 1 | ||
57 | Y | OversampleEn | bool | 0→1 | 0 | ||
58 | Y | OversampleSize | 10 | 0→7 | 0 | ||
59 | Y | ScopeEnable | bool | 0→1 | 0 | ||
60 | Y | ScopeTrigEdge | bool | 0→1 | 1 | ||
61 | Y | ScopeTrigCh | 10 | 0→15 | 4 | ||
62 | Y | ScopeArmMode | 10 | 0→3 | 2 | ||
63 | Y | ScopeAdcThresh | hex | 0x0→0xffff | 0 | ||
64 | Y | ScopeHoldoff | 10 | 0→(2^13)-1 | 0 | ||
65 | Y | ScopeOffset | 10 | 0→(2^13)-1 | 3000 | ||
66 | Y | ScopeTraceLength | hex | 0x0→0x1fff | 1fff | ||
67 | Y | ScopeSkipSamples | 10 | 0→(2^13)-1 | 1 | ||
68 | Y | ScopeInputA | 10 | 0→31 | 17 | ||
69 | Y | ScopeInputB | 10 | 0→31 | 18 | ||
--------------------------------- LEFT BLANK ------------------------------------------------- | |||||||
70 | Y | CompTH_DAC | hex | 0x0→0x3f | 1a | ||
71 | Y | CompEn_lowB | bool | 0x0→0x1 | 0 | ||
72 | Y | CompEn_midB | bool | 0x0→0x1 | 1 | ||
73 | Y | CompEn_topB | bool | 0x0→0x1 | 1 | ||
74 | Y | PulserSync | bool | 0x0→0x1 | 0 | ||
75 | Y | pixelDummy | hex | 0x0→0xff | 5a | ||
76 | Y | Pulser | hex | 0x0→0x3ff | a | ||
77 | Y | Pbit | bool | 0x0→0x1 | 0 | ||
78 | Y | atest | bool | 0x0→0x1 | 0 | ||
79 | Y | test | bool | 0x0→0x1 | 0 | ||
80 | Y | Sab_test | bool | 0x0→0x1 | 0 | ||
81 | Y | Hrtest | bool | 0x0→0x1 | 0 | ||
82 | Y | PulserR | bool | 0x0→0x1 | 0 | ||
83 | Y | DM1 | hex | 0x0→0xf | 0 | ||
84 | Y | DM2 | hex | 0x0→0xf | 1 | ||
85 | Y | Pulser_daq | hex | 0x0→0x7 | 3 | ||
86 | Y | MonostPulser | hex | 0x0→0x7 | 0 | ||
87 | Y | DM1en | bool | 0x0→0x1 | 0 | ||
88 | Y | DM2en | bool | 0x0→0x1 | 0 | ||
89 | Y | emph_bd | hex | 0x0→0x7 | 0 | ||
90 | Y | emph_bc | hex | 0x0→0x7 | 0 | ||
91 | Y | VREF_DAC | hex | 0x0→0x3f | 13 | ||
92 | Y | VrefLow | hex | 0x0→0x3 | 3 | ||
--------------------------------- LEFT BLANK ------------------------------------------------- | |||||||
93 | Y | TPS_tcomp | bool | 0x0→0x1 | 1 | ||
94 | Y | TPS_MUX | hex | 0x0→0xf | 0 | ||
95 | Y | RO_Monost | hex | 0x0→0x7 | 3 | ||
96 | Y | TPS_GR | hex | 0x0→0xf | 3 | ||
97 | Y | S2D0_GR | hex | 0x0→0xf | 3 | ||
98 | Y | PP_OCB_S2D | bool | 0x0→0x1 | 1 | ||
99 | Y | OCB | hex | 0x0→0x7 | 3 | ||
100 | Y | Monost | hex | 0x0→0x7 | 3 | ||
102 | Y | fastPP_en | bool | 0x0→0x1 | 0 | ||
103 | Y | Preamp | hex | 0x0→0x7 | 4 | ||
104 | Y | Pixel_CB | hex | 0x0→0x7 | 4 | ||
105 | Y | Vldl_b | hex | 0x0→0x3 | 1 | ||
106 | Y | S2D_tcomp | bool | 0x0→0x1 | 0 | ||
107 | Y | Filter_DAC | hex | 0x0→0x3f | 11 | ||
108 | Y | testLVDTx | bool | 0x0→0x1 | 0 | ||
109 | Y | tc | hex | 0x0→0x3 | 0 | ||
110 | Y | S2D | hex | 0x0→0x7 | 3 | ||
111 | Y | S2D_DAC_Bias | hex | 0x0→0x7 | 3 | ||
112 | Y | TPS_tcDAC | hex | 0x0→0x3 | 0 | ||
113 | Y | TPS_DAC | hex | 0x0→0x3f | 10 | ||
114 | Y | testBE | bool | 0x0→0x1 | 0 | ||
115 | Y | is_en | bool | 0x0→0x1 | 1 | ||
116 | Y | DelEXEC | bool | 0x0→0x1 | 0 | ||
117 | - | - | Copy this ASIC | - | - | - | - |
118 | - | - | Return | - | - | - | - |
--------------------------------- LEFT BLANK ------------------------------------------------- | |||||||
118 | Y | DelCCKreg | bool | 0x0→0x1 | 0 | ||
119 | Y | RO_rst_en | bool | 0x0→0x1 | 1 | ||
120 | Y | SLVDSbit | bool | 0x0→0x1 | 1 | ||
121 | Y | FELmode | bool | 0x0→0x1 | 1 | ||
122 | Y | CompEnOn | bool | 0x0→0x1 | 1 | ||
123 | Y | RowStart | hex | 0x0→0x1ff | 0 | ||
124 | Y | RowStop | hex | 0x0→0x1ff | b1 | ||
125 | Y | ColumnStart | hex | 0x0→0x7f | 0 | ||
126 | Y | ColumnStop | hex | 0x0→0x7f | 2f | ||
127 | Y | chipID | 10??? | - | 0 | ||
128 | Y | S2D1_GR | hex | 0x0→0xf | 3 | ||
129 | Y | S2D2_GR | hex | 0x0→0xf | 3 | ||
130 | Y | S2D3_GR | hex | 0x0→0xf | 3 | ||
131 | Y | trbit | bool | 0x0→0x1 | 1 | ||
132 | Y | S2D0_tcDAC | hex | 0x0→0x3 | 1 | ||
133 | Y | S2D0_DAC | hex | 0x0→0x3f | 14 | ||
134 | Y | S2D1_tcDAC | hex | 0x0→0x3 | 1 | ||
135 | Y | S2D1_DAC | hex | 0x0→0x3f | 12 | ||
136 | Y | S2D2_tcDAC | hex | 0x0→0x3 | 1 | ||
137 | Y | S2D2_DAC | hex | 0x0→0x3f | 12 | ||
138 | Y | S2D3_tcDAC | hex | 0x0→0x3 | 1 | ||
139 | Y | S2D3_DAC | hex | 0x0→0x3f | 12 |