Overview
Data Format
At each trigger, the UDP Encoder sends one header structure followed by up to eight channel structures.
See the definitions of encoder_header_t and encoder_channel_t in github:
https://github.com/slac-lcls/lcls2/blob/master/psdaq/drp/UdpDetector.hh
Configuring the Timing System
Matt Weaver writes
I just updated the 'tprtrig' application in the lcls2 repo. You can get it to trigger the EVR on a DAQ partition like so:
tprtrig -t a -c 0 -o 1 -d 2 -w 10 -p 4
programs EVR /dev/tpra (-t a) to generate a TTL trigger using logic channel 0 (-c 0) on output 0 (-o 1 [bit mask]) with delay of 2 119MHz clocks (-d 2) and width 10 119 MHz clocks (-w 10) for every L1Accept on partition 4 (-p 4).