Search/Navigation:
Related:
SLAC/EPP/HPS Public
Jefferson Lab/Hall B/HPS Run Wiki
S30XL-LESA/LDMX
20190419
L0M20 Half Module with pinholes pulled
High Voltage Test
(V) (uA)
V:D/I:D
50 0.44
100 0.59
200 0.89
300 2.62
400 7.57
440 11.05
445 14.55
Low Voltage Test
(V) (A)
V:D/I:D
Pre-Config
AVDD: 2.50 0.107
DVDD: 2.50 0.243
V125: 1.25 0.000
Post-Config
AVDD: 2.50 0.310
DVDD: 2.50 0.244
V125: 1.25 0.226
Bad Channel Table
Sector B Sector A
pCH | apvCH | 128+apvCH | 2*128-apvCH-1| 128-apvCH-1
APV0
0 | 0 | 128 | 255 | 127
APV1
156 | 28 | 156 | 227 | 99
APV2
273 | 17 | 145 | 238 | 110
APV3
426 | 42 | 170 | 213 | 85
448 | 64 | 192 | 191 | 63
461 | 77 | 205 | 178 | 50
471 | 87 | 215 | 168 | 40
484 | 100 | 228 | 155 | 27
489 | 105 | 233 | 150 | 22
506 | 122 | 250 | 133 | 5
511 | 127 | 255 | 128 | 0
Nlow: 11
Baseline Configuration at 0V bias:
50V Bias: