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Based on e-mail exchange between Mikhail, Gabriel, Jack, Faisal.


2018-02-26 email from Faisal:

1)      Just to elaborate a bit more, trbit is not part of the pixel config. It is part of the ASIC config just like atest, CompEn, etc. Your statement is correct it is defined per ASIC not camera.
2)      Configuration array can also be found under psana.Epix.Config10kaV1 …. asicPixelConfigArray. Please see https://github.com/slaclab/cac/blob/master/psana/epix10ka/dump_config.py
Bit coding is as follows: MSB to LSB

Pixel Mask

ga     g     M     T
x      x     1     x     pixel is masked
x      x     0     1     pixel is under test
0      0     x     x     auto switch
0      1     x     x     force switch
1      0     x     x     low gain (fixed)
1      1     x     x     high gain (fixed)
 
For example
0x0 for all pixel is auto switch. If tr=1, then auto switch high to low, if tr=0 then auto switch medium to low. Please note trbit is not part of the pixel config.
0xC is fixed high gain if tr=1, fixed medium if tr=0.
0x8 is fixed low gain. tr=1. tr=0 is not to be used here.
If you want to mask a pixel AND it with 0x2
If you want to test a pixel e.g. run the internal pusler then AND its config with 0x1.

Calibration rows

# psana returns 4 rows: r0, r1, r2, r3
 
     wirebonds
#|||||||||#
#¯¯¯¯|¯¯¯¯#
# A2 | A1 #
#----|----#
# A3 | A0 #
#____|____#
#|||||||||#
     wirebonds
 
# r0 is row 176 in ASIC0 and ASIC3
# r1 is row 176 in ASIC1 and ASIC2
 
# r2 is row 177 (last) in ASIC0 and ASIC3
# r3 is row 177 (last) in ASIC1 and ASIC2
 
# when pixel (ga,g ,M,T) is xx0x then 176 is baseline and 177 is pixel max
# when pxiel (ga,g ,M,T) is xx1x then 176 is pixel max and 177 is baseline
 

 References

 

 

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