FEB Production

Front End Board Testing on Support Plate

FEB ID	Diode & Protection Res. Rework	Tested w/ 4 Hybrids FEB on Support Plate	Cleaned	Ready for Loading on Final FEB Support Plate	Comment
1	Yes	12/10/2014	-		Ben 12/15/14: "Board 1 wasn't getting a link when Omar tested last week. When I run on my desk with the test firmware it works fine. I recommend we flash the normal firmware back and try again." Omar 12/15/14: When hybrids are powered up, the current of CH 0 DVDD is ~0 and the currents of CH 1 and 2 AVDD are ~0.
2	Yes	-	-	-	FEB mezzanine Amtech connector has been replaced but the board does not have any rework done. Ben 12/15/14 - Rework is now done. Had incorrect resistor divider on 3.3V rail resulting in 4.8V output. May have damaged the FPGA.
3	Yes	-	-	-	Waiting to be reworked. Initial test have shown that only 19/20 APV's can be synced. Ben 12/16/14 - Omar and were able to get all APVs to sync. Need to take data to see what noise looks like.
4	Yes	12/10/14 results	-	-	Waiting to be reworked. Initial test have shown that, except for the edge channels, the noise on FEB CH 0-2 ranges from ~47-50 ADC counts. This is consistent with previous observations so these channels seem fine. There is a ripple in the noise present on FEB CH 03 and the noise across the whole hybrid is ~10 ADC counts higher than the rest of the channels.
5	Yes	12/11/14 results	12/11/14	Yes	It looks fine.
6	Yes	12/11/14 results	-	Yes	The baseline and noise of FEB CH 00 has issues. Most of the events had a baseline at ~6150 ADC counts and the noise was ~900 ADC counts. The behavior worsened in subsequent runs. Ben 12/15/14: VREF level for CH 00 preamps was 1.8V instead of 1.25. This is now fixed. Board is awaiting retesting with the RCE. Omar 12/15/14: Looks fine after fix was applied.
7	Yes		-	Yes	This board looks fine.
8	Yes	12/11/14 results	12/11/14	Yes	This board looks fine.
9	Yes	-	-	Yes	Ben 12/15/14 - Had short on C743. Fixed now. Needs testing with RCE. Omar 12/15/2014: Looks fine after fix was applied.
10	Yes	12/11/14 results 1, results 2	12/11/14	Yes	After power cycling? everything looks fine now.
11	Yes	12/10/14 results 1, results 2	12/11/214	No	Again, overall the noise looks fine (~50 ADC counts) but there seems to be some samples that still have a large shift in the noise. Looking at the baseline distribution, there seems to be some large tails so that's probably the problem (ADC sampling point is off?).
12	Yes	12/11/14 results	12/11/14	Yes	The baseline, once again, has tails but overall the noise looks fine on all FEB channels. The baseline and noise on FEB CH 1 and 3 have features similar to what we saw yesterday -- first sample noise is shifted by ~5-10 ADC counts. All other samples look fine.
13	Yes	12/10/14		-	A link to the FEB couldn't be established. Board 13 has some known issues on its D1.0V rail Ben 12/15/14: Works on my desk. Seem to have intermittent problems. We should avoid using it in the system if we can. Omar 12/15/14: This board powers up fine, however, I was unable to sync any of the APV's.
14	Yes	12/10/14 results	12/11/14	Yes	Looks fine.
15	Yes	12/10/14 results	12/11/14	Yes	Baseline has tails and the shifts in the noise are present on the same APV's as before (on CH 1) but otherwise it looks fine.

Front End Board Map

FEB ID	Device DNA	Fd Serial	Loaded	Tested	Status	Mounted on FEB cold plate	Notes
1	0x14084072beb01c00	0xdb000015df877001	09/2014	10/XX/2014 (OM)	OK	Yes
2			09/2014		BAD	No	10/02/2014: DVDD is flaky. Seems like FPGA is unable to completely power up. Missing pin found on the terminal side of the FEB
3	0x74d04072beb01c00	0x42000015df80ca01	09/2014	10/XX/2014 (OM)	OK	Yes	10/28/2014: Broken pin found on the terminal side of HV connector. The pin is redundant so the HV should be unaffected.
4	0x70d04072beb01c00	0x53000015dfa68a01	09/2014	10/XX/2014 (OM)	OK	No
5	0x58d04072beb01400	0x4d000015df9e2101	09/2014	10/XX/2014 (OM)	OK	Yes
6			09/2014		?
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Front End Board Testing on Support Plate

Front End Board Map