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Useful resources

Table of contents

Components

FPGA

The FPGA that will be used is XCKU15P-2FFVA1760E from AMD/Xilinx.

  • Package mechanical drawing
  • FPGA measured 3D model
  • Difference between the drawing and 3D model used:
    • Total height (A = A1 + A2):
      • 3D model is 3.86 mm
      • Drawing is 3.71 mm (max)
    • Solder ball height (A1):
      • 3D model is 0.6 mm
      • Drawing is 0.6 mm (max)
    • Package height (A2):
      • 3D model is 3.26 mm
      • Drawing is 3.21 mm (max)
    • → It seems that the 3D model of the package we have is not 100% accurate, but the difference (3.86-3.71=0.15 mm) is negligible
    • Any thermal interface between the package and the cooling block should be able to "absorb" this difference

Optical transceiver


DC/DC converters

12V vs 24V input?

Clocks

TODO: Simplify the copy of the GT readout platform below

clock-diagram

Timing


ADC/DAC

How many ADC channels are needed?

Temperature


Humidity


LDO monitoring


ASIC monitoring


LDOs


Various peripherals

ID


Flash


JTAG


Block diagram

3x2-readout-board-overview

Power

FPGA

https://www.xilinx.com/products/technology/power/xpe.html

ASICs

TODO: Update the copy-pasted table below

ASIC Power Requirement

Analog Section

Digital Section

I/O Section

0.6V Sink

Analog TPS

ePixUHR 140k 2x2 Detector

ePixUHR 140k 2x2 Detector

ePixUHR 140k 2x2 Detector

ePixUHR 140k 2x2 Detector

ePixUHR 140k 2x2 Detector

Voltage

1.3 V

1.3V

1.3V

??? Maybe

2.5 V

Required current

10A

(= 2.5 A* 4 ASIC)

- Old digital design:
1.2 A (= 0.3 A * 4 ASIC)
-New digital design

????

1.6 A
(= 0.4 * 4 ASIC)

[1RX, 8TX, 8serializer and 2cm clkspine : ~ 317mA]


??? (If existing lower or equal than SparkPixS)

0.4 A

(=0.1 * 4 ASIC) 


System Requirement

+1.3 V @ +17.5 A

(Adding +30% current for PVT variation)

+1.3 V @ +3 A

(Adding +30% current for PVT variation)

[waiting for the new digital design] 

+1.3 V @ +2.5 A

(Adding +30% current for PVT variation)

+0.6 V @ -11 A

This current is not provided by the LDO. But it passes through it.

(Adding +30% current for PVT variation)

+2.5 V @ +0.5 A

(Adding +30% current for PVT variation)

Power graph

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