Block diagram

Components

FPGA

The FPGA that will be used is XCKU15P-2FFVA1760E from AMD/Xilinx.

• Package mechanical drawing
• FPGA measured 3D model
• Difference between the drawing and 3D model used:
  • Total height (A = A1 + A2):
    • 3D model is 3.86 mm
    • Drawing is 3.71 mm (max)
  • Solder ball height (A1):
    • 3D model is 0.6 mm
    • Drawing is 0.6 mm (max)
  • Package height (A2):
    • 3D model is 3.26 mm
    • Drawing is 3.21 mm (max)
  • → It seems that the 3D model of the package we have is not 100% accurate, but the difference (3.86-3.71=0.15 mm) is negligible
  • Any thermal interface between the package and the cooling block should be able to "absorb" this difference

Optical transceiver

DC/DC converters

Clocks

Timing

ADC/DAC

Temperature

Humidity

LDO monitoring

ASIC monitoring

LDOs

Various peripherals

ID

Flash

JTAG