ePix10kA: Rogue vs. LCLS Register-Settings

	LCLS
#	Name	Base	Range.........	Default...	Change
1	Version			0
2	DigitalCardId0			0
3	DigitalCardId1			0
4	AnalogCardId0			0
5	AnalogCardId1			0
6	CarrierId0			0
7	CarrierId1			0
8	BaseClockFrequency			0
9	FirmwareHash			?
10	FirmwareDesc			?
11	EvrRunCode	10	0→(2^8)-1	40
12	EvrDaqCode	10	0→(2^8)-1	40
13	EvrRunTrigDelay	10	0→(2^31)-1	18223
14	NumberOfAsicsPerRow	10	2→2	2
15	NumberOfAsicsPerColumn	10	2→2	2
16	NumberOfRowsPerAsic	10	176→176	176
17	NumberOfReadableRowsPerAsic	10	0→176	176
18	NumberOfPixelsPerAsicRow	10	192→192	192
19	CalibrationRowCountPerASIC	10	2→2	2
20	EnvironmentalRowCountPerASIC	10	1→1	1
21	ASICs	-	-	-	-
22	Pixel Map	-	-	-	-
23	Calib Map	-	-	-	-
--------------------------------- LEFT BLANK -------------------------------------------------
24	EpixRunTrigDelay	10	0→(2^31)-1	64000
25	EpixDaqTrigDelay	10	0→(2^31)-1
26	DacSettings	hex	0x0→0xffff	0
27	asicGR	bool	0→1	0
28	asicGRControl	bool	0→1	0
29	asicAcq	bool	0→1	0
30	asicAcqControl	bool	0→1	0
31	asicR0	bool	0→1	0
32	asicR0Control	bool	0→1	0
33	asicPpmat	bool	0→1	1
34	asicPpmatControl	bool	0→1	1
35	asicPpbe	bool	0→1	0
36	asicPpbeControl	bool	0→1	0
37	asicRoClk	bool	0→1	0
38	asicRoClkControl	bool	0→1	0
--------------------------------- LEFT BLANK -------------------------------------------------
39	adcStreamMode	bool	0→1	0
40	testPatternEnable	bool	0→1	0
41	AcqToAsicR0Delay	10	0→(2^31)-1	18223
42	AsicR0ToAsicAcq	10	0→(2^31)-1	12969
43	AsicAcqWidth	10	0→(2^31)-1	12969
44	AsicAcqLToPPmatL	10	0→(2^31)-1	259
45	AsicPPmatToReadout	10	0→(2^31)-1	0
46	AsicRoClkHalfT	10	0→(2^31)-1	5
47	AdcClkHalfT	10	1→400	1
48	AsicR0Width	10	0→(2^31)-1	39
49	AdcPipelineDelay0	10	0→(2^31)-1	31
50	AdcPipelineDelay1	10	0→(2^31)-1	31
51	AdcPipelineDelay2	10	0→(2^31)-1	31
52	AdcPipelineDelay3	10	0→(2^31)-1	31
--------------------------------- LEFT BLANK -------------------------------------------------
53	AsicMask	hex	0x0→0xf	f
54	EnableAutomaticRunTrigger	bool	0→1	0
55	NumbClockTicksPerRunTrigger	10???	-	833,333
56	ChostCorrEn	bool	0→1	1
57	OversampleEn	bool	0→1	0
58	OversampleSize	10	0→7	0
59	ScopeEnable	bool	0→1	0
60	ScopeTrigEdge	bool	0→1	1
61	ScopeTrigCh	10	0→15	4
62	ScopeArmMode	10	0→3	2
63	ScopeAdcThresh	hex	0x0→0xffff	0
64	ScopeHoldoff	10	0→(2^13)-1	0
65	ScopeOffset	10	0→(2^13)-1	3000
66	ScopeTraceLength	hex	0x0→0x1fff	1fff
67	ScopeSkipSamples	10	0→(2^13)-1	1
68	ScopeInputA	10	0→31	17
69	ScopeInputB	10	0→31	18
--------------------------------- LEFT BLANK -------------------------------------------------
70	CompTH_DAC	hex	0x0→0x3f	1a
71	CompEn_lowB	bool	0x0→0x1	0
72	CompEn_midB	bool	0x0→0x1	1
73	CompEn_topB	bool	0x0→0x1	1
74	PulserSync	bool	0x0→0x1	0
75	pixelDummy	hex	0x0→0xff	5a
76	Pulser	hex	0x0→0x3ff	a
77	Pbit	bool	0x0→0x1	0
78	atest	bool	0x0→0x1	0
79	test	bool	0x0→0x1	0
80	Sab_test	bool	0x0→0x1	0
81	Hrtest	bool	0x0→0x1	0
82	PulserR	bool	0x0→0x1	0
83	DM1	hex	0x0→0xf	0
84	DM2	hex	0x0→0xf	1
85	Pulser_daq	hex	0x0→0x7	3
86	MonostPulser	hex	0x0→0x7	0
87	DM1en	bool	0x0→0x1	0
88	DM2en	bool	0x0→0x1	0
89	emph_bd	hex	0x0→0x7	0
90	emph_bc	hex	0x0→0x7	0
91	VREF_DAC	hex	0x0→0x3f	13
92	VrefLow	hex	0x0→0x3	3
--------------------------------- LEFT BLANK -------------------------------------------------
93	TPS_tcomp	bool	0x0→0x1	1
94	TPS_MUX	hex	0x0→0xf	0
95	RO_Monost	hex	0x0→0x7	3
96	TPS_GR	hex	0x0→0xf	3
97	S2D0_GR	hex	0x0→0xf	3
98	PP_OCB_S2D	bool	0x0→0x1	1
99	OCB	hex	0x0→0x7	3
100	Monost	hex	0x0→0x7	3
102	fastPP_en	bool	0x0→0x1	0
103	Preamp	hex	0x0→0x7	4
104	PxeLCB	hex	0x0→0x7	4
105	Vld_b	hex	0x0→0x3	1
106	S2D_tcomp	bool	0x0→0x1	0
107	Filter_DAC	hex	0x0→0x3f	11
108	testLVDTx	bool	0x0→0x1	0
109	tc	hex	0x0→0x3	0
110	S2D	hex	0x0→0x7	3
111	S2D_DAC_Bias	hex	0x0→0x7	3
112	TPS_tcDAC	hex	0x0→0x3	0
113	TPS_DAC	hex	0x0→0x3f	10
114	testBE	bool	0x0→0x1	0
115	is_en	bool	0x0→0x1	1
116	DelEXEC	bool	0x0→0x1	0
117	Copy this ASIC	-	-	-	-
118	Return	-	-	-	-
--------------------------------- LEFT BLANK -------------------------------------------------
118	DelCCKreg	bool	0x0→0x1	0
119	RO_rst_en	bool	0x0→0x1	1
120	SLVDSbit	bool	0x0→0x1	1
121	FELmode	bool	0x0→0x1	1
122	CompEnOn	bool	0x0→0x1	1
123	RowStart	hex	0x0→0x1ff	0
124	RowStop	hex	0x0→0x1ff	b1
125	ColumnStart	hex	0x0→0x7f	0
126	ColumnStop	hex	0x0→0x7f	2f
127	chipID	10???	-	0
128	S2D1_GR	hex	0x0→0xf	3
129	S2D2_GR	hex	0x0→0xf	3
130	S2D3_GR	hex	0x0→0xf	3
131	trbit	bool	0x0→0x1	1
132	S2D0_tcDAC	hex	0x0→0x3	1
133	S2D0_DAC	hex	0x0→0x3f	14
134	S2D1_tcDAC	hex	0x0→0x3	1
135	S2D1_DAC	hex	0x0→0x3f	12
136	S2D2_tcDAC	hex	0x0→0x3	1
137	S2D2_DAC	hex	0x0→0x3f	12
138	S2D3_tcDAC	hex	0x0→0x3	1
139	S2D3_DAC	hex	0x0→0x3f	12

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