Confluence will be unusable 23-July-2024 at 06:00 due to a Crowd upgrade.
Power supply design (option 3):
Recommended ADC drivers:
Driver reference designs:
TINA-TI simulations:
Fast ADC for high gain (2x) channels:
Slow ADC for low gain (0.5x) channels:
For the FPGA we can use a XCKU040 part for about $800
Parameters from meeting of 27 October:
Bandwidth Lower Limit = 10 kHz
Bandwidth Upper Limit = 500 MHz
Sampling Rate = 1 GHz
1 p.e. distribution probable lower limit ~ 1 mV
maximum signal = 1e4 p.e.