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Maps

DAQ mapping as of 12/18/2014   

GUI FEB #Physical FEBFEB S/N stickerDAQ FEB #Physical Flange Board ChannelHigh Speed Cable #
0L1t70F0J11
1

L2-3t

61F0J22
2L5t112F0J33
3L6t103F1J14
4L4t54F1J26
5L4b88F2J39
6L5b129F3J110
7L6b155F3J211
8L1b96F2J17
9L2-3b147F2J28

Flange to FEB Mapping

Picture of physical FEB mounting (Jan 14th 2015)
 

 

Patch Panel Map

Low voltage:

DB44 connectorFEB #FEB #
P1L1tL2t
P2L5tL6t
P3L4tL4b
P4L5bL6b
P5L1bL2b

High voltage:

REDEL connectorFEBs
1Top half (top connector)
2Bottom half (bottom connector)

Original high voltage GUI to physical hybrid mapping

link to excel file.

Reloading PGP card drivers

Typically after a reboot we need to reload the pgp card driver. 

$ cd /u1/pgpcard/software/driver_old/

$ ./pgpcard_load


 

OLD: Take a calibration run with expert SVT GUI

 

Start the DAQ:

 

$ cd /u1/software/software_new

 

$ source setup_env.csh

 

$ ./bin/frontEndTestGui

 

Click <read status> and make sure no error is seen. If so, check that the FEB is powered correctly.

 

Make sure the AxiXadc temperature is ok (50-60C).

 

Configure with config/FrontEndBoardConfigC01.xml

 

Click <read status> and check that more registers are found.

 

Turn on power to hybrids (see below)

 

Do a hard reset under commands/FebCore/HybridHardReset (current on AVDDP should drop ~100mA).

 

Click <Write config>.

 

Do a soft reset under commands/FebCore/HybridSoftReset.

 

Check that the hybrid currents measured are ok. Sync status for each channel can be seen in register RceCore/DataPath[x]/Synced, 1xf for powered channels.

 


 

Test Run SVT Group C Setup

 

Group C SVT test setup

 


 

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