Page History
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- current configuration time is long at 34s
- fiber-power monitoring on the detector side and kcu1500
- have to manually lock the lanes between ASICs and managing FPGA by running 1000 events
- not all lanes in an ASIC lock (can perhaps be fixed with improved delay settings)
- data is currently scrambled (not natural order)
- remove epixViewer imports in _Root.py
Miscellaneous Info
Currently running on drp-neh-cmp003 and using (perhaps incorrectly) tdetsim.service.
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