...
A summary of the key GBCR control registers (based on GBCR spec document V1.2.3 from Nov/2022). There are 3 registers per GBCR input channel for independent EQ controls of each channel and another 11 registers for coming controls of retime mode and TX pre-emphasis:
| Address | Default | Bits | Name | Function |
|---|---|---|---|---|
| 0 | 0x1F | 0-2 | ch1CML_AmlSel<2:0> | Output amplitude of input RX channel 1 |
| 3-4 | ch1EQ_ATT<1:0> | EQ attenuator for input RX channel 1. | ||
| 5 | ch1dis_EQ_LF | Diable Low Frequency CTLE stage for RX inpyt channels 1. | ||
| 6-7 | NC | |||
| 1 | 0xBB | 0-3 | ch1CTLE_MFSR<3:0> | Middle frequency (0.2-0.4 GHz) peaking strength |
| 4-7 | ch1CTLE_HFSR<3:0> | High frequency (0.4-1.6 GHz) peaking strength | ||
| 2 | 0x02 | 0 | ch1disLPF | Disable DC offset cancellation in RX input channels 1 |
| 1 | ch1disDFF | Disable DFF in input RX channel 1. RX channel works in equalizer mode. | ||
| 2 | ch1Dis | Disable RX input channel 1 | ||
| 3-7 | NC | |||
| 3-5 | Same block of registers for RX input channel 2 as address 0-2 for channel 1 | |||
| 6-8 | Same block of registers for RX input channel 3 as address 0-2 for channel 1 | |||
| 9-11 | Same block of registers for RX input channel 4 as address 0-2 for channel 1 | |||
| 12-14 | Same block of registers for RX input channel 5 as address 0-2 for channel 1 | |||
| 15-17 | Same block of registers for RX input channel 6 as address 0-2 for channel 1 | |||
| 18-20 | NC | Same block of registers for RX input channel 7 as address 0-2 for channel 1 | ||
| 21 | 0x02 | 0 | dllCapRest | Reset control voltage in DLL. |
| 1 | dllEnable | Enable DLL in phase shifter | ||
| 22 | 0x0F | 0-3 | dllChargePumpCurrent<3:0> | Set charge pump current |
| 4 | dllForceDown | Force down charge pump output | ||
| 5-7 | NC | |||
| 23 | 0x33 | 0-3 | dllClockDelayCh6<3:0> | Config clock delay of channel 6 |
| 4-7 | dllClockDelayCh7<3:0> | Config clock delay of channel 7 | ||
| 24 | 0x33 | Similar dllClockDelay control for channel 4,5 | ||
| 25 | 0x33 | Similar dllClockDelay control for channel 2,3 | ||
| 26 | 0x33 | Similar dllClockDelay control for channel 0,1 | ||
| 27 | 0x70 | 0 | disTestCK | Disable Test clock output |
| 1-2 | CLK_Rx_EQ<1:0> | Config passive EQ in eRx for input clock | ||
| 3 | CLK_Rx_invData | Invert output data of eRx for input clock | ||
| 4 | CLK_Rx_enTermination | Enable the termination resistors of eRx for input clock | ||
| 5 | CLK_Rx_setCM | Set common mode voltage of eRx for input clock | ||
| 6 | CLK_Rx_En | Enable eRx doe input clock | ||
| 7 | NC |
...
| 28 | 0x05 | 0-2 | Tx1_Emp<2:0> | Set pre-emphasis strength of TX channel 1 |
| 3 | Tx1_EmpDis | Disable TX channel 1 pre-emphasis | ||
| 4-7 | NC | |||
| 29 | 0x01 | 0 | Tx1dis_LPF | Disable DC offset cancellation in TX channel 1 |
| 1 | Tx1dis | Disable TX channel 1 | ||
| 2-7 | NC | |||
| 30 | 0x05 | 0-2 | Tx2_Emp<2:0> | Set pre-emphasis strength of TX channel 2 |
| 3 | Tx2_EmpDis | Disable TX channel 2 pre-emphasis | ||
| 4-7 | NC | |||
| 31 | 0x01 | 0 | Tx2dis_LPF | Disable DC offset cancellation in TX channel 2 |
| 1 | Tx2dis | Disable TX channel 2 | ||
| 2-7 | NC |
GBCR Retime mode
One major feature of the GBCR is the retime mode which is using a similar design as in lpGBT, but GBCR has a finer DLL delay granularity of 50ps per step vs 100ps in lpGBT. This is an essential utility to allow optimized control of the signal sampling time as the expected good time window at full chain loss is narrow. The control setting for this mode:
| Register | Value | Comments |
|---|---|---|
| dllEnable | True | Enable DLL clock for for retiming |
| dllCapReset | False | |
| dllForceDown | False | DLL can have harmonic lock problem which would need dllForceDown=T to release it |
| dllChargePumpCurrent | 0x0 | Set charge injection current to min value. Higher current enables faster locking but may cause larger jitter. |
| dllClockDelay | scan | Scan this delay for the active channel for good BER window bathtub. |
Some Useful Links
- Optoboard System Documentation
- FELIX JIRA (Oct/22) on optoboard + ITkPix readout setup
- CERN mattermost Bern-Optoboard channel
- Talk (Dec/9/2022) by Angira Rastogi on Optoboard-FELIX setup at LBNL
...