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Current firmware allows only 2 lpGBTs to be readout, such that the link alignment string is fixed to x0000000300000000 for channels 00 and 01 in unaligned state. Alignment can be checked using data from module RX 0 (L0 on miniDP-SMA) after module configuration, giving the following link alignment strings independently of which e-links are subscribed on felixcore startup (for optoboard 2400006):

miniDP-SMA ChannelAlignment String NameValue
L1 UPLINK 00

DECODING_LINK_ALIGNED_00

0x000000030000001

L1 UPLINK 01DECODING_LINK_ALIGNED_00

0x000000030000010

L1 UPLINK 02DECODING_LINK_ALIGNED_00

0x000000030000000

L1 UPLINK 03DECODING_LINK_ALIGNED_00

0x000000030001000

L1 UPLINK 04DECODING_LINK_ALIGNED_00

0x000000030010000

L1 UPLINK 05DECODING_LINK_ALIGNED_00

0x000000030100000

L2 UPLINK 06

DECODING_LINK_ALIGNED_01

0x000000030000001

L2 UPLINK 07DECODING_LINK_ALIGNED_01

0x000000030000010

L2 UPLINK 08DECODING_LINK_ALIGNED_01

0x000000030000000

L2 UPLINK 09DECODING_LINK_ALIGNED_01

0x000000030001000

L2 UPLINK 10DECODING_LINK_ALIGNED_01

0x000000030010000

L2 UPLINK 11DECODING_LINK_ALIGNED_01

0x000000030100000

There is a broken connection in an unstable or broken lane on the optoboard corresponding to L1 UPLINK 02 in the ERF-SMA board or within the optoboard itself, which is not present in optoboard 2400011 (currently installed). Note that alignment is sensitive to polarity of TX connection (i.e. NP↔NP vs NP↔PN) but not to the RX connections.

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At present the full chain including PP0 and Type 0 ring cannot be read out using FELIX. The following channel mapping is used in the connectivity file. Chips 2 and 4 send data on power-up. Chip 1 has poor data transmission quality on the negative polarity side, but is not observed using the LBL adapter card indicating that this is a feature of the ring+PP0.

Mini-DP SMA ChannelRx LaneChip IDChip Number
L030x154683
L120x154484
L210x154292
L300x154281

Interface with LBL adapter board

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The downlink differential signal polarity should not be inverted (i.e. P↔P and N↔N SMA connections between DP and Optoboard BOB), as this is only required due to the ring channel mapping. L3,L2,L1,L0 are connected to EFF-SMA board UPLINK 00,01,02,04. Before configuration, alignment bit is unstable on UPLINK 01 (chip 2) and always 0 for other channels, but after configuration all alignment bits are zero. This is similar behavior as observed with the PP0+Ring.

Mini-DP SMA ChannelRx LaneChip IDChip Number
L030x154480
L120x154281
L210x154292
L300x154683

Running Vivado ILA on FELIX:

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