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NOTE: when setting up an opal, the LCLS2 timing comes in on lane 1 (counting from zero) on the second QSFP, as described here:  https://github.com/slaclab/cameralink-gateway.

NOTE: we have an intermittent power-on deadlock: when powering on the opal/feb-box (front-end-board) the LED on the FEB box will stay red until the DAQ has configured it, when it will turn green.  Also, only after the DAQ configuration is done will the  Sometimes it affects the "@ID?" and "@BS?" uart strings sent to the camera here work.  This is probably also registers and the DAQ will crash (hence the deadlock).  We should tolerate ID/BS registers not working when drp executable starts.  This lack of configuration is fixable by loading a rogue yaml config file included in the cameralink-gateway git repo by going to the software directory and running with enableConfig=1 like this: "python scripts/devGui --pgp4 0 --laneConfig 0=Opal1000 --pcieBoardType Kcu1500 --enLclsII 1 --enableConfig 1 --startupMode 1" 

Code Block
(ps-4.1.0) drp-neh-cmp011:~$ python ~/git/cameralink-gateway/software/scripts/devGui.py --camType Opal1000 --enLclsI False --enLclsII True --startupMode True
Rogue/pyrogue version v5.4.0. https://github.com/slaclab/rogue
sendString: @ID?
sendString: @BS?
start: Started zmqServer on port 9101
Got ACK Response
recvString: @"OPAL-1000m/CL S/N:254067
Got ACK Response
recvString: @"1.20;2.31;2.52

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