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- Partial Reconfiguration in the ISE Design Suite
- ug702 - Partial Reconfiguration User Guide
- NB, this says "Partial Reconfiguration is not currently supported in the Vivado Design Suite."
- This comment is apparently out of date; xapp1159 implies that Vivado can be used.
- ug470 - Series FPGAs Configuration User Guide
- ug744 - Partial Reconfiguration of a Processor Peripheral Tutorial
- Zynq 7000 Partial Reconfiguration Reference Design
- xapp1159 - Partial Reconfiguration of a Hardware Accelerator on Zynq-7000 All Programmable SoC Devices
- xapp918 - Incremental Design Reuse with Partitions
- xapp290 - Differencing Method for Partial Reconfiguration
- This seems to be an alternate method to using reconfigurable regions, described in the other documents.
- It is not advised to use this method if routing changes are desired.
- This method is good for changing I/O standards, block RAM contents, and LUT programming.
tool/fpgacontains code for (re)loading the FPGA fabric