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- hitmap width 15
- hitmap delay 6
- hitmap_deadtime 0
- hold_delay 34
- veto_width 5
- veto_delay 16
Packet error events
These runs need to be studied to cverify events begore and after errors
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ACD Calibrations with ACD timed in
Run 700000829 BT12 ACD pedestal run Tile 4 far from the table - this pedestal reference run
Run 700000830 BT12 ACD run Tile 4 according to calibration setting
Run 700000831 BT12 ACD run Tile 3 according to calibration setting has 10% packet errors
Run 700000832 BT12 ACD run Tile 2 according to calibration setting has 30% packet errors
Run 700000833 BT12 ACD run Tile 1 according to calibration setting has 30% packet errors
Run 700000834 BT12 ACD run Tile 0 according to calibration setting has 30% packet errors
High Voltage Set to 760 - too high pulse heights from tiles 0 and 1
Created BT12 which is same as BT1 but with Zero suppression off for Alex to see pedestals. See configuration for details.
These are calibration runs for ACD tiles
Run 700000837 BT12 ACD run Tile 4 according to calibration setting
Run 700000838 BT12 ACD run Tile 3 according to calibration setting has 10% packet errors
Run 700000839 BT12 ACD run Tile 2 according to calibration setting has 30% packet errors
Run 700000840 BT12 ACD run Tile 1 according to calibration setting has 30% packet errors
Run 700000841 BT12 ACD run Tile 0 according to calibration setting has 30% packet errors