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This file is considered part of an RTEMS BSP and can be found in $RTEMS${RTEMS_ROOT}/src/c/src/lib/libbsp/powerpc/virtex5/dlentry. What's written here is written for the PPC 440 found in Xilinx Virtex 5 parts. The Virtex 4 version is similar.

• In our case, the boot code starts at startup
  • Other names are start, download_entry and __rtems_entry_point
• Boot code vaguely follows the "Initialization Software Requirements" outlined in the PowerPPC 440x5 Embedded Processor Core User's Manual v7.1 from IBM
  • Why only "vaguely"?
• Clear MSR
• Disable debug events
• Configure instruction and data cache registers
• Set up decrementer and timer registers
• Clear exception registers ECR and XER
• Invalidate instruction and data caches
• Clear the CPU reservation bit
• Set up CCR0, CCR1, MMUCR, CRF and CTR
• Set up TLB pages
• Set up debug events
• Set up EABI and SYSV environment
• Clear out BSS section
• Load vector offset register
• Set up TOC ( overwrites r2?i.e., r2)
• Set up initial stack (i.e., r1)
• Set up argument registers r3, r4 and r5
• Branch to boot_card()

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While the RTEMS structure provides for allowing this function to be supplied by the RTEMS BSP, we use the version that the distribution comes with. It is found in the $RTEMS${RTEMS_ROOT}/src/c/src/lib/libbsp/shared directory called bootcard.c.

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This constitutes our contributions to RTEMS. The code here sets up the processor and board for generic use. Files related to it can be found in $RTEMS${RTEMS_ROOT}/src/c/src/lib/libbsp/powerpc/virtex5/...}}.

The functions prefixed with app_ are supplied by the RTEMS application, i.e., the RCE project, in our case.

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