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The digital quad 20UPGR91101015 with ITkPixV1.1 FEs with V2.4 common Quad hybrid design. Module fabrication history can be check in ProdDB. The module QC test record just after assembly are here. 


Power Adaptor
RD53B quad power adaptor design repository

1 DP Readout Adaptor: There are a few different types of data adapters. This is the one where all 4 chips are readout through one DP connector (DP1), one line per chip. V1.0 1DP Quad Readout Adaptor Design repo (schematics).


Notes: 
  • The birth ID of 20UPGR91101015 was 20UPGR92101015 (which should be used for DB search) and the module ID changed when shipped to CERN. 
  • eFuse burning of Chip 1 0x15448 ID had a mistake that burnt 0x15408 instead. ChipNameCheck during configuration may complain.

  • Use the 16x1 configuration in both software and firmware (you can check the firmware with ./bin/specComTest, and reflash the firmware if needed).

  • The 1 DP readout adaptor had 10KOhm resistor pulldown for each data line leg. This is deemed unnecessary and may introduce more noise. So they were remove as of May/12/2023. 
  • There is an inconsistency in the 1DP readout adaptor design files. The DP pin numbers printed on adaptor PCB next to the DP connector disagree with the schematics (see table below).    

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From tests, 3 chips on this module work pretty consistently with these settings while the last one (0x15448) always has some issues (only tested digital scans so far). Following Alex's initial observations, further setup checks seems to indicate chip 4 (0x15448) prefers cmlBias0/1=500/0.  

An explanation on the connectivity:

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