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  • (done) Move to Rogue 6: v 1.10.0
  • current configuration time is long at 34s
    • some progress on this: now 10s according to Ric (check that we're down to 2-3 seconds that rogue sees?)
  • fiber-power monitoring on the detector side and kcu1500
    • not there yet on march 22, 2024
  • have to manually lock the lanes between ASICs and managing FPGA by running 1000 events: feels awkward-ish
    • what does epixHR do?
  • not all lanes in an ASIC lock (can perhaps be fixed with improved delay settings)
    • most have 3-5 lanes that don't function or are unstable (out of 24)
  • data is currently scrambled (not natural order)
    • ric is descrambling ASICS in software, but would like to move to hardware
  • (done) remove epixViewer imports in _Root.py
  • add batcherEventBuilder to kcu1500
    • use Lcls2EpixHrXilinxKcu1500Pgp4_10Gbps, which contains a BEB
    • make the ePixM devGui compatible
  • remove 8 bytes of null padding between timing header elements
  • fix set-registers-before-each-charge-injection-event issue
    • Implement FPGA registers to rearm ASICs on each event when test register is true?
  • (done) Split prepareChargeInjection() into 2 functions, the first taking first and last column (as now) and the second taking a 384 element numpy array (e.g., setupChargeInjection(self, asicIndex, lane_selected, pulserValue))
  • Since the scan work, normal data taking runs now see dropped and short frames from ASIC 0
  • DAQ has no environmental monitoring support as yet
    • needs board re-spin (boards in layout on March 22, 2024)
  • will epixM automatically increase charge with each injection pulse like epixHR?  Dionisio thinks probably not (will double-check with Lorenzo).
  • need to know common-mode "bank" info
    • each lane?
    • other structures for ADC?

Miscellaneous Info

Asic readout order:

The ASICs are in this format. ASIC 0 and 1 rotated 180 degree (viewed looking at the sensor):

0 1

3 2

Currently running on drp-neh-cmp003 and using (perhaps incorrectly) tdetsim.service.

...

  • will use a new detector for beam time
  • *** 5kHz epixM
    • run-trigger and daq-trigger patterns:
      • 5k,5k
      • 5k,120
      • 5k,2.5k
    • matt provides "divisors-of-5k" script which should still work
  • *** timing scans
    • configuration scan
  • *** fibers/nodes
    • have 11 working fiber pairs and 1 broken one. epixhr uses 3 (2 data 1 timing) epixm uses 5 (4 data 1 timing 1 register)
        • cpo submitted Jira to fix broken fiber and add fix cassettes between 208 and src
        • need to check that all 11 are working
    • Chris Ford is tasked with running timing/data fibers in 208/srcf and by default will use cmp034 for the epixM
        • need detector group help going from mezzanine to hutch
  • *** does psana handle disabled lanes correctly?  currently the disabled lanes get a fixed number put in them (lane-number).  this may work with Mikhail's.
  • tstx00417 in ~tstopr/data/drp/tst/tstx00417/xtc/ runs 313 and 314 but shape may be incorrect.
  • cable to see acquisition window on the scope?
    • dawood will check
  • intensity scans
    • done by changing the beam so no work required from daq group
  • pedestals
    • soft-low
    • soft-hi
    • threshold in the middle SA
    • mikhail will work on "placeholder" infrastructure but there are subtleties that we won't worry about for the beam time 
  • don't necessarily need calibrated data
  • (lower priority) more precisely define how we handle the gain-switching, if at all?
    • soft-low (configurable threshold at one extreme)
    • soft-high (configurable threshold at the other extreme)
    • configurable threshold in the middle
    • what are the nominal gains? nominal gain ratio is 4.7
  • bit 15 is gain mode, bits 0-14 are data.  data bits may be trimmed in the future (13 or 12?)
  • (lower priority) charge-injection
    • mikhail/ric are putting in placeholder code, but doesn't work: waiting for ASIC/FPGA fix