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YAML file | Stream/Register name | Description | |
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1 | AxiVersion.yaml | UpTimeCnt | Number of seconds since last reset |
2 | BuildStamp | Time stamp of the FPGA build | |
3 | FpgaVersion | Version | |
4 | GitHash | Git hash of firmware project | |
5 | AxiSysMonUltraScale.yaml | Temperature | ADC temperature values |
6 | AmcCarrierBsi.yaml | EthUpTime | Uptime of ethernet in seconds |
7 | JesdRx.yaml 2 instantiations | StatusValidCnt[0] | Shows stability of JESD lanes. Counts number of JESD re-syncronisations |
8 | StatusValidCnt[1] | ||
9 | StatusValidCnt[2] | ||
10 | StatusValidCnt[3] | ||
11 | StatusValidCnt[4] | ||
12 | StatusValidCnt[5] | ||
13 | DaqMuxV2.yaml 2 instantiations | TriggerCascMask | covered in DaqMux documentation |
14 | TriggerHwAutoRearm | ||
15 | DaqMode | ||
16 | PacketHeaderEn | ||
17 | FreezeHwMask | ||
18 | DecimationRateDiv | ||
19 | DataBufferSize | ||
20 | TrigCount | ||
21 | DbgInputValid | ||
22 | DbgLinkReady | ||
23 | InputMuxSel[0/1/2/3] | ||
24 | StreamPause[0/1/2/3] | ||
25 | StreamReady[0/1/2/3] | ||
26 | StreamOverflow[0/1/2/3] | ||
27 | StreamError[0/1/2/3] | ||
28 | InputDataValid[0/1/2/3] | ||
29 | StreamEnabled[0/1/2/3] | ||
30 | FrameCnt[0/1/2/3] | ||
31 | FormatSignWidth[0/1/2/3] | ||
32 | FormatDataWidth[0/1/2/3] | ||
33 | FormatSign[0/1/2/3] | ||
34 | DecimationAveraging[0/1/2/3] | ||
35 | Timestamp[0/1] | ||
36 | TriggerDaq | ||
37 | ArmHwTrigger | ||
38 | FreezeBuffers | ||
39 | ClearTrigStatus | ||
40 | AxiStreamDmaRingWrite.yaml 2 instantiations | Initialize | covered in waveform engine documentation |
41 | StartAddr[0/1/2/3] | ||
42 | EndAddr[0/1/2/3] | ||
43 | WrAddr[0/1/2/3] | ||
44 | Enabled[0/1/2/3] | ||
45 | Mode[0/1/2/3] | ||
46 | MsgDest[0/1/2/3] | ||
47 | FramesAfterTrigger[0/1/2/3] | ||
48 | Status[0/1/2/3] | ||
49 | AmcCarrierCore.yaml | OutputConfig[0/1/2/3] | Crossbar configuration. Four outputs choosing from four inputs. Output and input enumeration is as follows:
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50 | 000TopLevel.yaml | Streams (Stream0 - Stream7) | Stream names to be initialized |
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Gliffy Diagram | ||||||||
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