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  • The Timepix detector is incapable of receiving timestamp information over a network interface. Thus, some other mechanism will be needed to synchronize the timestamps of the Timepix detector and the LCLS DAQ system.
  • The Timepix detector requires two TTL inputs: Reset and Trigger.   The Reset signal must precede the first Trigger signal.
  • The LCLS DAQ developers believe that this Reset+Trigger interface can be integrated successfully for a trigger rate of 120 Hz, which is the short-term goal.
    • We plan to do this with an xpm sequence that runs for the whole run, which generates the reset once at the beginning of the run and then drives L1Accepts for the remainder of the run.  This is inelegant, but acceptable for a short-term test
  • When and if the Timepix detector is chosen for integration at trigger rates greater than 120 Hz, hardware integration with the LCLS DAQ timestamp will be required.

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