Page History

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11:00AM
Removing FEB cooling plate from SVT box to rework FEBs. 

12:54PM
Extracted thee FEB cold plate and removed all FEBs. The two non-working FEBs (L1t and L6b) were sent to Ben directly; the other were given to Lupe for rework.
The default rework is to add Zener diodes to all FEBs and also to remove the FPGA LED that is always on (it's on the cooling plate side so we can't see it anyway; it indicates FPGA programming OK).
I added the serial number of each board to the mapping on the DAQ & Power Mapping in Group C page.

Equipment

Interlock board

see Group C interlock board for instructions on monitoring and controls.

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