Pix2PGP is a Data Readout logic architecture implemented in a Sparsified-Readout ASIC. It acts as a bridge between the Analog sections of an ASIC, and the PGP4LiteTx module which will be the next-generation interface between the ASIC's serializers and the rest of the system.

The goal is to make it generic and parametrized enough as to be able to be deployed in many different ASIC architectures.

Presentation

20240515_pix2pgp.pdf



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