• Created by Unknown User (phansson), last modified on May 13, 2014

Documentation:

 

Signal flange board

LV Power flange boardHV bias flange board

Board schematics

board page 

board pageboard page

Board layout

conceptual layout

board pageboard page

Punch lists

LV Power flange board v1

  • Make ANAP and ANAP_GND as beefy as possible and run on top of each other
  • Make DIG and DIG_GND as beefy as possible
  • Add plated holes between each row of pads including at edges

HV bias board v1

  • Add plated holes at corners of board for strain relief system access.

 

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