Webex meeting for those not at SLAC: https://confluence.slac.stanford.edu/display/hpsg/Webex+connection+details

Agenda
  • News from FE board or hybrid layout?
  • EPICS channels (spreadsheet )
  • Test beam preparations
  • Review 1st week of November
    • Still need formal charge and scope
  • Plans (round table)
  • AOB

Minutes

FE board and Hybrid:

Ben reported that Tung has started to look at the hybrid layout and found some issues that they would go over.
Ryan said that he will sit down with Tung on Monday to go over scheduling and priorities as there are many boards being layed out at the moment and he'll let us know what the plan will be.
Ben has been working this week on FE board firmware trying to implement the new blocks; mostly related to the new peripherals compared to the test run.

SVT Review

Still witing for charge and details. We discussed that it's important to draw a line between the SVT DAQ and the TDAQ parts to identify what parts are reviewed and what needs to be part of a separate review to avoid having things fall between chairs. More to come in the future meetings on this.

Slow control

Pelle showed a first list of channels for the slow control of the SVT DAQ. Needs to add power for flange boards and a monitoring channel for the internal hybrid voltage monitoring (if used). Will send to Hovanes before Monday.

Test beam in NLCTA

Pelle showed a couple of slides of the NLCTA area that will be used to run a test beam to test the sensor susceptibility for acute damage from large charge depositions (to simulate beam accident at JLab). Basic plan exists.
We'll have to make sure our PC can be setup with a new IP number.
Sho will help Pelle setup remote (RS232) control of the Keithly HV supply.
Pelle will ask for help when he knows more details.
The plan is to install whenever we have a stand that we can use. Hopefully next week .Data taking the week after most likely.

Flange board and optical channels

Ryan showed an initial schematic of a flange board. It was digital flange board i.e. no LV or HV power, handling 3 FE boards. The initial idea of physical layout was blocked out here: http://www.slac.stanford.edu/~rherbst/projects/heavyp/doc/flange_test.jpg
He would make an attempt of estimating the height of each board.
We would need 4 of these and thus have 2 spare FE board channel sets.
Ryan also discussed the options for how to group the optical channels on the RTM. The preferred option is to have a patch panel to allow more flexibility in the layout. This would help in reorganizing channels if there are problems. The other option would be to build a custom RTM to handle our input.
He mentioned that LSST will use a similar flange solution and that we should investigate how to leverage the R&D with them.

Omar had problem with a humidity sensor for running cold tests at UCSC, will look into borrowing the one from group C.
He also worked on conditions DB and how to dump the SVT configurations to the SB instead to text files. We also discussed if we want to have the calibration running separately from CODA or have CODA implement arguments passing on configure and run commands. Pelle will ask Sergey if the CODA group is discussing this option still.

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