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Requirements

RequirementePixUHRSparkPix-SSparkPix-ED
frame rate100kfps1Mfps1Mfps
Power supplies


Power for each supply


Number of IOs per ASIC


Expected IO speed


Total data bandwidth








Notes:

FPGA intercommunication

co-design with the data reduction pipeline

DFX for streaming pre-processing and eventually microAI, reusable building blocks



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