static long ConvPhaseEGU(aSubRecord *prec)
{
  long i;
  epicsUInt32 *a    = (epicsUInt32 *) prec -> a;
  float       *vala = (float       *) prec -> vala;

  for (i = 0; i < prec -> noa; ++i) 
  {
    // Convert raw integer to float 
    vala[i] = ((float)((a[i] & 0xBFFFFFF) << 6) / (float)(1ULL << 32) - 0.5) * (700 / 13);
  }
  return 0; /* process output links */
}

static long ComputePower(aSubRecord *prec)
{
  long  i, j;
  float rxp_c[5];

  // a: DiagBlock, b: ExtCalBlock, c: DiagMonType
  epicsUInt32 *a = (epicsUInt32 *) prec -> a;
  epicsUInt32 *b = (epicsUInt32 *) prec -> b;
  epicsUInt32 *c = (epicsUInt32 *) prec -> c;

  // vala: rxPower, valb: txPower
  float *vala = (float *) prec -> vala;
  float *valb = (float *) prec -> valb;

  unsigned short int txp_slo;
  signed   short int txp_off;

  // Initialize rxp_c
  for (i = 0; i < 5; ++i)
    rxp_c[i] = 0.0;

  unsigned short int txp = (unsigned short int)( ( ( a[7] & 0xFF ) << 8 ) | ( a[6] & 0xFF ) );
  unsigned short int rxp = (unsigned short int)( ( ( a[9] & 0xFF ) << 8 ) | ( a[8] & 0xFF ) );

  if ( c[0] & (1 << 4) )
  {
    txp_slo = (unsigned short int)( ( ( b[25] & 0xFF ) << 8 ) | ( b[24] & 0xFF ) ) / 256;
    txp_off = (signed short int  )( ( ( b[27] & 0xFF ) << 8 ) | ( b[26] & 0xFF ) );

    rxp_c[4] = (float)( ( ( b[3 ] & 0xFF ) << 24 ) | ( ( b[2 ] & 0xFF ) << 16 ) | ( ( b[1 ] & 0xFF ) << 8 ) | ( ( b[0 ] & 0xFF ) ) ); 
    rxp_c[3] = (float)( ( ( b[7 ] & 0xFF ) << 24 ) | ( ( b[6 ] & 0xFF ) << 16 ) | ( ( b[5 ] & 0xFF ) << 8 ) | ( ( b[4 ] & 0xFF ) ) ); 
    rxp_c[2] = (float)( ( ( b[11] & 0xFF ) << 24 ) | ( ( b[10] & 0xFF ) << 16 ) | ( ( b[9 ] & 0xFF ) << 8 ) | ( ( b[8 ] & 0xFF ) ) ); 
    rxp_c[1] = (float)( ( ( b[15] & 0xFF ) << 24 ) | ( ( b[14] & 0xFF ) << 16 ) | ( ( b[13] & 0xFF ) << 8 ) | ( ( b[12] & 0xFF ) ) ); 
    rxp_c[0] = (float)( ( ( b[19] & 0xFF ) << 24 ) | ( ( b[18] & 0xFF ) << 16 ) | ( ( b[17] & 0xFF ) << 8 ) | ( ( b[16] & 0xFF ) ) ); 
  }
  else
  {
    txp_slo  = 1;
    txp_off  = 0;
    rxp_c[1] = 1.0;
  }

  float txpwr = (float)( txp * txp_slo + txp_off ) * 0.0001; // mW
  float rxpwr = (float)( rxp_c[0] );

  unsigned short int rxpn = rxp;

  for (j = 0; j < 5; ++j)
  {
    rxpwr += (float)rxp_c[j] * (float)rxpn;
    rxpn  *= rxp;
  }

  rxpwr *= 0.0001; // mW
  vala[0] = rxpwr;
  valb[0] = txpwr;

  return 0; /* process output links */
}

record(longin,  "$(P):RXREADYSUMY") {
    field(DTYP, "asynInt32")
    field(DESC, "RX Ready")
    field(PINI, "YES")
    field(SCAN, "1 second")
    field(INP,  "@asyn($(PORT),0)RX_READY")
}

record(longout, "$(P):TXRSTSUMY") {
    field(DTYP, "asynInt32")
    field(DESC, "TX reset")
    field(PINI, "NO")
    field(SCAN, "Passive")
    field(OUT,  "@asyn($(PORT),1)TX_RESET")
}

record(waveform,    "$(P):LOOPPHAS") {
    field(DTYP,     "asynInt32ArrayIn")
    field(DESC,     "Loop phase measurement [14:0]")
    field(PINI,     "YES")
    field(SCAN,     "1 second")
    field(NELM,     "15")
    field(FTVL,     "LONG")
    field(INP,      "@asyn($(PORT),0)LOOP_PHASE")
}

record(mbbiDirect, "$(P):TXREADY") {
    field(DESC, "Tx Ready bits")
    field(PINI, "NO")
    field(SCAN, "Passive")
    field(INP,  "$(P):TXREADYSUMY CP")
}

record(mbboDirect, "$(P):LOOPBACKCTRL") {
    field(DESC, "Loopback write")
    field(PINI, "YES")
    field(SCAN, "Passive")
    field(OMSL, "supervisory")
    field(OUT,  "$(P):LOOPBACKENB PP")
    field(FLNK, "$(P):LOOPBACKRBV.PROC")
}

record(subArray,    "$(P):CH0_TXBUF") {
    field(DESC,     "Transmitter fifo depth [0]")
    field(PINI,     "NO")
    field(NELM,     "1")
    field(MALM,     "15")
    field(INDX,     "0")
    field(FTVL,     "LONG")
    field(INP,      "$(P):TXBUFDEPTH.VAL CP")
}

record(subArray,    "$(P):CH3_LOOPPHAS") {
    field(DESC,     "Loop phase [3]")
    field(EGU,      "ns")
    field(PINI,     "NO")
    field(NELM,     "1")
    field(MALM,     "15")
    field(INDX,     "3")
    field(FTVL,     "DOUBLE")
    field(INP,      "$(P):LOOPPHASEGU.VALA CP")
}

record(subArray,    "$(P):CH10_LOOPCLK") {
    field(DESC,     "Loop clocks measurement [10]")
    field(PINI,     "NO")
    field(NELM,     "1")
    field(MALM,     "15")
    field(INDX,     "10")
    field(FTVL,     "LONG")
    field(INP,      "$(P):LOOPCLKS.VAL CP")
}

$ cd tpgSupportApp/screens/pydm/
$ pydm -m "P=TPF:B084:000" activeFanout.ui

$ eco -m TpgSupport

$ source /afs/slac/g/lcls/tools/script/ENVS64.bash

## Set environment variables
epicsEnvSet("EPICS_CA_MAX_ARRAY_BYTES", "1000000")                                                                                                            
epicsEnvSet("DEVICE","TPF")
epicsEnvSet("SUBSYS","${DEVICE}")
epicsEnvSet("P","${DEVICE}:${SECTOR}:${STATION}")
#epicsEnvSet("YAML_DIR", "${TOP}/yaml-AmcCarrierTimingDelay")
epicsEnvSet("YAML_DIR", "${IOC_DATA}/${IOC}/yaml")
epicsEnvSet("YAML_DICT_DIR", "${TOP}/yaml")
epicsEnvSet("TOP_YAML","${YAML_DIR}/000TopLevel.yaml")

# Setting YAML_PATH so yaml files that are missing from the FPGA PROM can be added locally.
# YAML_PATH is a hardcoded macro used by cpswLoadYamlFile.
# The path follows a standard seen in other IOC apps:
# firmware/<firmware name>/<hash with 7 digits>/yaml_local
epicsEnvSet("YAML_PATH", "${TOP}/firmware/AmcCarrierTimingDelay/hash-12c3011/yaml_local") 

# =====================================================
# Source Channel Access Security
# =====================================================

< ${ACF_INIT}
< ${LOG_INIT}

## Register all support components
dbLoadDatabase("${TOP}/dbd/activeFanout.dbd",0,0)
activeFanout_registerRecordDeviceDriver(pdbbase) 

cd ${TOP}

## ======================================================================================
# Uncomment two lines below to read the yaml files from the FPGA PROM.
## Call the Yaml Downloader to download the YAML files from the FPGA.
# DownloadYamlFile(
#   FPGA_IP,    # Target FPGA IP address.
#   DEST_PATH)  # The destination folder where the YAML file will be written.
DownloadYamlFile("${FPGA_IP}", "${YAML_DIR}")
## ======================================================================================

## ======================================================================================
## Load FPGA hierarchy and register map from YAML files.
## cpswLoadYamlFile ( YAML hierarchy description and register map file,
##                    Root Device Name (optional; default = 'root'),
##                    directory where YAML includes can be found (optional),
##                    IP address for carrier board (override the IP address in YAML) )
##
## ======================================================================================
cpswLoadYamlFile("${TOP_YAML}", "NetIODev", "", "${FPGA_IP}")

## ================================================================================================
## Load FPGA configuration/initialization from a YAML file
## cpswLoadConfigFile ( CONFIG YAML file (NOT hierarchy YAML!),
##                      Path prefix (if config YAML is not based of the root device; optional),
##                      directory where YAML includes can be found (optional) )
## ================================================================================================
#cpswLoadConfigFile("${YAML_DIR}/config/defaultsGenRTMV2.yaml", "mmio", "")

## Don't use Automatic generation of records from the YAML definition
## 0 = No, 1 = Yes
epicsEnvSet("AUTO_GEN", 0)

## Dictionary file for manual (empty string if none)
epicsEnvSet("DICT_FILE", "activeFanout.dict")

## ==========================================================================================================================
## YCPSWASYN Configuration and Initialzation: EPICS Records will be born.
## ==========================================================================================================================
## Configure asyn port driver
## YCPSWASYNConfig(
##    Port Name,                 # the name given to this port driver
##    Root Path                  # OPTIONAL: Root path to start the generation. If empty, the Yaml root will be used
##    Record name Prefix,        # Record name prefix (ignored if not using auto-generation of records)
##    Use DB Autogeneration,     # Set to 1 for autogeneration of records from the YAML definition. Set to 0 to disable it
##    Load dictionary,           # Dictionary file path with registers to load. An empty string will disable this function
##    Named Root                 # OPTIONAL: Name of the root to be used, only necessary to support multiple ATCA blades on a single IOC.
## ==========================================================================================================================
YCPSWASYNConfig("ycpswPORT", "", "${P}", "${AUTO_GEN}", "${YAML_DICT_DIR}/${DICT_FILE}", "")

# =====================================================
# =====================================================
## Setup autosave/restore
# =====================================================
save_restoreSet_IncompleteSetsOk( 1 )
save_restoreSet_DatedBackupFiles( 1 )

set_requestfile_path("${TOP}/autosave")
set_requestfile_path("${IOC_DATA}/${IOC}/autosave-req")
set_savefile_path("${IOC_DATA}/${IOC}/autosave")

set_pass0_restoreFile("info_positions.sav")
set_pass0_restoreFile("${IOC}.sav")
set_pass1_restoreFile("info_settings.sav")

save_restoreSet_status_prefix("${P}:")
dbLoadRecords("db/save_restoreStatus.db", "P=${IOCPV}:")

# =====================================================
# =====================================================
## iocAdmin
# =====================================================
dbLoadRecords("db/iocAdminSoft.db"  , "IOC=${IOCPV}")
dbLoadRecords("db/iocRelease.db"  , "IOC=${IOCPV}")

# =====================================================
# =====================================================
## Load Active Timing Fanout databases
# =====================================================
## load records from the atf cpsw substitutions database
dbLoadRecords("db/af_cpsw.db", "P=${P}, PORT=ycpswPORT")

## load asub records
dbLoadRecords("db/af_asubRPhase.db", "P=${P}")

## load records that process the records from ycpswAsyn
dbLoadRecords("db/af_records_proc.db", "P=${P}")

## load records for general support
dbLoadRecords("db/af_support_records.db", "P=${P}")

## load records to support user displays
dbLoadRecords("db/af_summary.db", "P=${P}")
dbLoadRecords("db/af_summary_fiber.db", "P=${P}")

system("cp archive/${IOC}.archive ${IOC_DATA}/${IOC}/archive/") 

# =====================================================
# Turn on caPutLogging:
# Log values only on change to the iocLogServer:
# =====================================================
caPutLogInit("${EPICS_CA_PUT_LOG_ADDR}")
caPutLogShow(2)

# =====================================================
## Start saving datasets
# =====================================================
cd("${IOC_DATA}/${IOC}/autosave-req")

makeAutosaveFiles()

create_monitor_set("info_positions.req", 60, "")
create_monitor_set("info_settings.req", 60, "")
create_monitor_set("${IOC}.req", 60, "")

# Make sure that alarm configuration is correctly set for ycpswAsyn records
dbpf ${P}:RXLNKUP.LOW 0
dbpf ${P}:RXLNKUP.LSV MAJOR

# Bits 1 to 13 (starting from 0) must be set. Otherwise the alarm is MINOR.
# Bits 1 to 13 = 0x3FFE = 16382
dbpf ${P}:RXREADYSUMY.HIGH 16383
dbpf ${P}:RXREADYSUMY.LOW 16381
dbpf ${P}:RXREADYSUMY.HSV MINOR
dbpf ${P}:RXREADYSUMY.LSV MINOR

#!../../bin/linuxRT-x86_64/activeFanout

< envPaths

## Set environment variables
epicsEnvSet("SECTOR","B084")
epicsEnvSet("STATION","000")
epicsEnvSet("IOCPV","SIOC:B084:TS08")
epicsEnvSet("FPGA_IP", "10.0.1.106")

cd ${TOP}

< iocBoot/common/af_pre_init.cmd

iocInit()

< iocBoot/common/af_post_init.cmd

cd <ioc-boot-directory>
./st.cmd

iocconsole <ioc-name>