Presentations

Summary Table:

Green Fileed = Supported

Red Filled = Not Supported

Yellow Filled = In progress of testing or adding support

Minor Version Number	1	1	1	1	3
	Vivado Support
Major Version Number	2014.x	2015.x	2016.x	2017.x
Multiple IP core generation
PROM generation
ILA Debug generation
VCS script generation
Incremental Compile
Partial Configuration
Vivado HLS					Issue with co-sim and finding VCS
System Generator
SDK

We are not supporting any Vivado version before 2014.1
Xilinx has dropped 32-bit support for version 2015.1 (or later). If you are building on a 32-bit Linux kernel, you will need to use 2014.4 (or earlier).
We are only supporting "Incremental Compile" for version 2015.3 (or later) <http://www.xilinx.com/video/hardware/incremental-compile-updates-for-2015_3.html>
We are not supporting Vivado 2017.1. This is due to lots of batch mode related bugs in 2017.1 release, which got fixed in 2017.2.

We are only going to support SDK for Vivado 2015.4 (or later) because that was the version that we started to support/build SDK in our build system.
In Vivado 2016.2, the AXI_INTC does not support interrupts that are external port(s) of the .bd module and cause SDK to crash during the build of the .ELF file. Because of this, we decided not to support SDK for Vivado 2016.3
- Note: In Vivado 2016.2, internal interrupt signals within the .bd module would not cause the AXI_INTC to crash during SDK's building of the .ELF file

We don't support Vivado HLS for version 2014.2 because requires too many manual soft-links to be created for the library paths to make it work.

Due to AR# 59236, we are not supporting System Generator before 2014.3
For 2015.3, there is a bug in System Generator exporting both RTL and .DCP. In both exporting types, System Generator hangs and never generates the output files. This was tested using both Matlab R2014b and R2015b