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The MDSP is a Texas Instruments 6201 integer DSP running at 160 MHz with two internal 64 kB blocks of memory and an additional 32 MB of (slower) external memory. The MDSP has ROD and BOC registers connected to one of its External Memory InterFaces (EMIFs) thereby allowing any ROD or BOC registers to be set from the host via the MDSP. The MDSP runs software to perform system functions while the FPGA performs real-time functions. Module configuration is performed by the MDSP using
its multi-channel buffered serial ports (SP0 and SP1); configuration data is passed to the MDSP from the
host. In calibration mode the MDSP serial ports are also used to send triggers. During normal ATLAS
running the trigger and event description information (Level-1 ID, bunch-count ID and triggertype) is
supplied to the ROD by the TIM. The TIM trigger is detected inside of the Controller and expanded into
the trigger codes required by the Pixel and SCT modules. The trigger code is then sent out a 48-wide
mask gate and propagated on to the modules.
Here is a link to the TWiki for the PixelDSP group: https://twiki.cern.ch/twiki/bin/view/Atlas/PixelDsp
I will provide some instructions for running tests of the DSP code.
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