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Create the ycpswAsynDriver with a dictionary option, i.e. use a limited number of interfaces to the FPGA registers, and load the YAML tree hierarchy.
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# ===========================================
# DRIVER SETUP
# ===========================================
# Load FPGA hierarchy and register map from YAML files.
cpswLoadYamlFile("$(YAML_DIR)/000TopLevel.yaml", "NetIODev", "", "$(FPGA_IP)")
# Load FPGA configuration/initialization from a YAML file
cpswLoadConfigFile("$(YAML_DIR)/config/defaultsGenRTMV2.yaml", "mmio", "")
# Yaml File
epicsEnvSet("YAML_FILE", "$(YAML_DIR)/000TopLevel.yaml")
# Use Automatic generation of records from the YAML definition
# 0 = No, 1 = Yes
epicsEnvSet("AUTO_GEN", 0)
# Dictionary file for manual (empty string if none)
epicsEnvSet("DICT_FILE", "phaseLocker.dict")
YCPSWASYNConfig("${PORT}", "", "${PREFIX}", "${AUTO_GEN}", "$(YAML_DIR)/${DICT_FILE}", "")
asynSetTraceMask("${PORT}",, -1, 0) |
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