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ATLAS: CHESS2: Documentation
ATLAS: CHESS2: Carrier/Daughter Board Requirements
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Home
Design Documentation
ATLAS Design Documentation
ATLAS: CHESS2: Documentation
ATLAS: CHESS2: Carrier/Daughter Board Requirements
Page History
Versions Compared
Old Version
13
changes.mady.by.user
Larry Ruckman
Saved on
Jul 21, 2016
compared with
New Version
14
changes.mady.by.user
Larry Ruckman
Saved on
Jul 28, 2016
Previous Change: Difference between versions 12 and 13
Next Change: Difference between versions 14 and 15
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Daughter Board Requirements:
Board
+ cables needs to fit within
must fit into
a 7.8cm (3.071") wide x 4.6cm (1.811") high x 10cm (3.937") deep cavity
Drawing of the cavity
No cabling requiring
Mounting hole requirements:
???
4x non-plated mounting holes
Board Materi
al:
FR4
same as CHESS1
Board Thickness:
standard 1.6mm thickness
same as CHESS1
Allow board components:
ASIC,
resistors,
capacitor
(ceramic only)
, wire bonds
Not allow board components:
Resistors
,
HV LEMO
plastic/metal connector
HV through the connector
ASIC-to-board epoxy material:
???
Resistor Type:
Thin film only
Capacitor Type:
Ceramics only
Arldite
Wire bonds Material:
aluminum wedge wiring bonding
???
ASIC Thermal Management Plan:
???
HV LEMO:
Needs to be able to add cold plate
Need to assign a mech. eng. to design the cold plate
(Action Item for Su Dong)
Standard LEMO
But positioned as far as possible from the ASIC
Board Connector:
Gold
Hard gold
finger edge connector
???
Able to test the daughter board before and after radiation without unsoldering/soldering any component:
Achieved via the edge connector
Convenient HV and LV powering scheme:
HV through LEMO
LV through daughter-to-carrier cabling
Only implement the high speed digital signals
???
Off load the test structure testing to the CHESS1 carrier board
???
No right side wiring bonding pads
Requires a different CHESS2 daughter card design for CHESS1 board
???
Add cutout in the PCB board
(Action Item for JJJ to define this)
Carrier Board Requirements:
...
Overview
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