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The phase locker IOC provides the controls to interface with the phase locker firmware.  The latter takes at its inputs a VCO-controlled RF signal and an RF-reference signal of the same frequency.  Subsequently, the computed phase error between the two signals is used to estimate a correction voltage, which in turn gets applied to the VCO to tune the VCO-generated signal.  This is repeated until the two signals are locked together in phase within an acceptable margin.

Firmware

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Description

The diagram below sheds more light in the process outlined above.

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IOC Repository

The IOC is housed in by the masterSource App.  The intended released tag in Production is R2.2.3.

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Code Block
languagebash
## Load dbd
dbLoadDatabase("dbd/masterSource.dbd", 0, 0)
masterSource_registerRecordDeviceDriver(pdbbase)

## Environment variables
epicsEnvSet("ENGINEER", "MICHAEL SKOUFIS")
epicsEnvSet("STREAM_PROTOCOL_PATH", "${TOP}/db")
## Tag log messages with IOC name
epicsEnvSet("EPICS_IOC_LOG_CLIENT_INET", "${IOC}")

## Load records
# **** Load iocAdmin databases to support IOC Health and monitoring ****
dbLoadRecords("db/iocAdminSoft.db", "IOC=${IOC_NAME}")
dbLoadRecords("db/iocAdminScanMon.db", "IOC=${IOC_NAME}")
dbLoadRecords("db/iocRelease.db", "IOC=${IOC_NAME}")

## Autosave initialization
< $(TOP)/iocBoot/common/autosave_init.cmd

## Channel Access Security:
# This is required if you use caPutLog.
# Set access security file
# Load common LCLS Access Configuration File
< ${ACF_INIT}

## Update archive pv list in ${IOC_DATA}
system("cp $(TOP)/archive/${IOC}.archive ${IOC_DATA}/${IOC}/archive/")

Autosave initialization

Tell the IOC where to find the list of record names that and where they will be autosaved.  Also, restore previously autosaved values.

Code Block
languagebash
# =====================================================================
# Load database for autosave status
# =====================================================================
dbLoadRecords("db/save_restoreStatus.db", "P=${IOC_NAME}:")

# ============================================================
# If all PVs don't connect continue anyway
# ============================================================
save_restoreSet_IncompleteSetsOk(1)

# ============================================================
# created save/restore backup files with date string
# useful for recovery.
# ============================================================
save_restoreSet_DatedBackupFiles(1)

# ============================================================
# Where to find the list of PVs to save
# ============================================================
set_requestfile_path("${IOC_DATA}/${IOC}/autosave-req")

# ============================================================
# Where to write the save files that will be used to restore
# ============================================================
set_savefile_path("${IOC_DATA}/${IOC}/autosave")

# ============================================================
# Prefix that is use to update save/restore status database
# records
# ============================================================
save_restoreSet_status_prefix("${IOC_NAME}:")

## Restore datasets
set_pass0_restoreFile("info_positions.sav")
set_pass1_restoreFile("info_positions.sav")

set_pass0_restoreFile("info_settings.sav")
set_pass1_restoreFile("info_settings.sav")

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Besides the auto-generated record names for autosave, copy the manually generated list of records to be autosaved and restore their previously autosaved values.

Code Block
languagebash
# Copy over the manual settings request file
system("cp $(TOP)/autosave/${IOC}.req ${IOC_DATA}/${IOC}/autosave-req/")

# Load manual settings from autosave
set_pass0_restoreFile("${IOC}.sav")
set_pass1_restoreFile("${IOC}.sav")

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Create the ycpswAsynDriver with a dictionary option, i.e. use a limited number of interfaces to the FPGA registers, and load the YAML tree hierarchy.

Code Block
languagebash
# ===========================================
#              DRIVER SETUP
# ===========================================

# Use Automatic generation of records from the YAML definition
# 0 = No, 1 = Yes
epicsEnvSet("AUTO_GEN", 0)

# Dictionary file for manual (empty string if none)
epicsEnvSet("DICT_FILE", "phaseLocker.dict")

YCPSWASYNConfig("${PORT}", "", "${PREFIX}", "${AUTO_GEN}", "$(YAML_DIR)/${DICT_FILE}", "")
asynSetTraceMask("${PORT}",, -1, 0)

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A complete list of the phase locker IOC Process Variables (PVs) can be found in the page linked below, along with revision dates based on feedback received from the naming team.

Linac Locking - Phase Locker IOC (PVs [sioc-sys0-ms10) PVs]

New Displays

Currently, there is no phase locker test stand in Dev and hence only the Production display is available.

Production


To access and launch the display linac locking dashboard GUI in Production, follow the steps outlined below. 

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log onto the appropriate host (Production ==>  lcls-srv01) and then run the command mslk_dashboard:

[softegr@lcls-srv01

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skoufis]$ mslk_dashboard
lcls-srv01
[2024-03-18 15:26:22,275] [INFO    ] - Using PyDM via SSH. Reverting to Software Rendering.
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Upon running the command successfully, the following display is invoked.  Choose Phase Locker Expert to monitor the phase locker IOC.

Image Added

Old Displays

Note that the preferred way of accessing the display is the one shown above.  However, below, we include instructions on how to launch the old display directly if needed.

Production

To access and launch the display in Production, follow the steps outlined below. 

Code Block
languagebash
[softegr@lcls-srv01 skoufis]$ cd $EPICS_IOCS/sioc-sys0- cd $EPICS_IOCS/sioc-sys0-ms10/iocSpecificRelease/masterSourceApp/srcDisplay/
[softegr@lcls-srv01 skoufis]$ cat masterSourceApp/srcDisplay/README.phaselocker 

To run the phase locker screen in production, follow these steps from within this directory:

1. $ source /usr/local/lcls/epics/setup/epicsenv-7.0.3.1-1.0.bash
2. $ source /usr/local/lcls/tools/script/ENVS64.bash
3. $ pydm -m "PREFIX=PRL:SYS0:1" plocker.ui
1" plocker.ui


The Phase Locker Expert is an engineering screen intended to be used by the firmware engineer for tuning until a locked state is achieved.

Image Added

Register Configuration For Locked State

The registers have been tuned to achieve a lock in Production.  See below the display with the selected values.  These values are also captured by autosave.

Image Added

Deliverables

The released software will be made available in the main IOC release area post-deployment (Dev: /afs/slac/g/lcls/epics/iocTop/masterSource/, Production:/usr/local/lcls/epics/iocTop/masterSource/).  See below for the specific repositories and tags.

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See firmware release details below.

References 

View file
nameLCLS 476MHz VCO Phase Locking Firmware Design.docx
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View file
nameStep by step guide_476VCO test.docx
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