REVISED LCLS PV Name (10/10) | REVISED LCLS PV Name (10/02) | Proposed LCLS PV Name (Orig.) | PCDS PV Name | Record Type | DESC | Functionality |
---|
${PREFIX} |
:M:ATOP:ACORE:SM:loDacControlMux: |
Stlongout | LO DAC control 0 for PLL 1 for manualLO_CTRL | ${PREFIX}:LO_DAC_CTRL | ${PREFIX}:LO_DAC_CTRL_MUX | ${PREFIX}:M:ATOP:ACORE:SM: |
clockDacControlMuxloDacControlMux:St | longout |
CLK LO DAC control 0 for PLL 1 for manual |
|
${PREFIX}:CLK_CTRL | ${PREFIX}:CLK_DAC_CTRL | ${PREFIX}:CLK_DAC_CTRL_MUX | ${PREFIX}:M:ATOP:ACORE:SM: |
monitorDacControlMuxclockDacControlMux:St | longout |
Monitor CLK DAC control 0 for PLL 1 for manual |
|
${PREFIX}: |
M:ATOP:ACORE:SM:Mux4:StMON_CTRL | ${PREFIX}:MON_DAC_CTRL | ${PREFIX}:MON_DAC_CTRL_MUX |
longout | laserDaqtrig | ${PREFIX}:M:ATOP:ACORE:SM: |
Mux5monitorDacControlMux:St | longout |
Slow laser DAC offsetMonitor DAC control |
|
|
| ${PREFIX}:MUX4 | ${PREFIX}:M:ATOP:ACORE:SM: |
Mux6Mux4:St | longout |
Not usedlaserDaqtrig |
|
|
| ${PREFIX}:MUX5 | ${PREFIX}:M:ATOP:ACORE:SM: |
Mux7Mux5:St | longout |
RF DAC SelectSlow laser DAC offset |
|
|
| ${PREFIX}:MUX6 | ${PREFIX}:M:ATOP:ACORE:SM: |
clockPllReferenceSelectMux6:St | longout |
CLK ref ADC select 0: ADC 1_5 1: ADC 1_4 | Not used |
|
|
| ${PREFIX}:MUX7 | ${PREFIX}:M:ATOP:ACORE:SM: |
loPllKpMux7:St | longout |
LO loop P term gainRF DAC Select |
|
|
| ${PREFIX}: |
M:ATOPCLK_PLL_REF_SEL | ${PREFIX}:M:ATOP:ACORE:SM: |
loPllKiclockPllReferenceSelect:St | longout | CLK ref ADC select 0: ADC 1_5 1: ADC 1_4 |
LO loop I term
|
|
| ${PREFIX}:LO_PLL_KP | ${PREFIX}:M:ATOP:ACORE:SM: |
clockPllKploPllKp:St | longout |
CLK LO loop P term gain |
|
|
| ${PREFIX}:LO_PLL_KI | ${PREFIX}:M:ATOP:ACORE:SM: |
clockPllKiloPllKi:St | longout |
CLK LO loop I term |
|
|
| ${PREFIX}:CLK_PLL_KP | ${PREFIX}:M:ATOP:ACORE:SM: |
adPllKiclockPllKp:St | longout |
ADPLL CLK loop |
I termP term |
|
|
| ${PREFIX}:CLK_PLL_KI | ${PREFIX}:M:ATOP:ACORE:SM: |
adPllKpclockPllKi:St | longout |
ADPLL CLK loop |
P I term |
|
|
| ${PREFIX}: |
M:ATOP:ACORE:SM:loPllReferenceSelect:Stlongout | LO PLL REF SELECTAD_PLL_KI | ${PREFIX}:M:ATOP:ACORE:SM: |
CMDregadPllKi:St | longout |
Laser Repeating Sequence StairADPLL loop I term |
|
|
| ${PREFIX}:AD_PLL_KP | ${PREFIX}:M:ATOP:ACORE:SM: |
newphasesetpointadPllKp:St | longout |
| ADPLL loop P term |
|
|
| ${PREFIX}:LO_PLL_REF_SEL |
New Phase Set point | ${PREFIX}:M:ATOP:ACORE:SM: |
phaseshiftrequestloPllReferenceSelect:St | longout |
| LO PLL REF SELECT |
|
|
| ${PREFIX}:CMD_REG |
Phase shift request | ${PREFIX}:M:ATOP:ACORE:SM: |
maxphasestepCMDreg:St | longout |
Maximum phase stepLaser Repeating Sequence Stair |
|
| ${PREFIX}:PHAS_SETPT | ${PREFIX}:NEW_PHASE_SETPT | ${PREFIX}:M:ATOP:ACORE:SM: |
Laser_Kpnewphasesetpoint:St | longout |
Laser KpNew Phase Set point |
|
longout | Laser Ki |
| ${PREFIX}: |
M:ATOP:ACORE:SM:Laser_Ki:StPHAS_SHFT_REQ | ${PREFIX}:PHASE_SHFT_REQ |
${PREFIX}:M:ATOP:ACORE:SM: |
Laserdisablephaseshiftrequest:St | longout |
Laser disablePhase shift request |
|
| ${PREFIX}:M:ATOP:ACORE:SM:LaserPole:St | longout | LaserLoopPoleMAX_PHAS_STEP | ${PREFIX}:M:ATOP:ACORE:SM:LaserVCOset:St | longout | Set Laser VCO DAC with mux3 equals to 6 | MAX_PHASE_STEP | ${PREFIX}:M:ATOP:ACORE:SM:RFDAC_Kpmaxphasestep:St | longout | RFDAC KpMaximum phase step |
|
${PREFIX}:M:ATOP:ACORE:SM:RFDAC_Ki:St | longout | VCO_KP | ${PREFIX}:LOOP_KP | ${PREFIX}:LASER_KPRFDAC Ki | ${PREFIX}:M:ATOP:ACORE:SM:RFDACPoleLaser_Kp:St | longout | RFDAC PoleLaser Kp |
|
${PREFIX}:M:ATOP:ACORE:B0:Att0:SetValue:St, | longout | Serial Attenuator | VCO_KI | ${PREFIX}:M:ATOP:ACORE:B0:Att1:SetValue:St | longout | LOOP_KI | ${PREFIX}:LASER_KISerial Attenuator | ${PREFIX}:M:ATOP:ACORE:B0:Att2:SetValueSM:Laser_Ki:St | longout | Serial AttenuatorLaser Ki |
|
${PREFIX}:M:ATOP:ACORE:B0:Att3:SetValue:St | longout | Serial Attenuator | VCO_DISABLE | ${PREFIX}:LOOP_DISABLE | ${PREFIX}:LASER_DISABLE | ${PREFIX}:MM:ATOP:ACORE:B0SM:Att4:SetValueLaserdisable:St | longoutSerial Attenuator | Laser disable |
|
${PREFIX}:VCO_POLE | ${PREFIX}:LOOP_POLE | ${PREFIX}:LASER_POLE | ${PREFIX}:M:ATOP:ACORE:B0SM:Att5:SetValueLaserPole:St | longout | Serial AttenuatorLaserLoopPole |
|
${PREFIX}:M:ATOP:ACORE:B1:Att0:SetValue:St | longout | VCO_SETPT | ${PREFIX}:LOOP_VCO_SET | ${PREFIX}:LASER_VCO_SETSerial Attenuator | ${PREFIX}:M:ATOP:ACORE:B1SM:Att1:SetValueLaserVCOset:St | longout | Serial AttenuatorSet Laser VCO DAC with mux3 equals to 6 |
|
|
| ${PREFIX}:RFDAC_KP | ${PREFIX}:M:ATOPM:ATOP:ACORE:B1:Att2:SetValueSM:RFDAC_Kp:St | longoutSerial Attenuator | RFDAC Kp |
|
|
| ${PREFIX}:RFDAC_KI | ${PREFIX}:M:ATOP:ACORE:B1:Att3:SetValueSM:RFDAC_Ki:St | longout | Serial AttenuatorRFDAC Ki |
|
|
| ${PREFIX}:C:AS56040:OutputConfig:Rd | waveform | Output Configuration Data[3:0] | RFDAC_POLE | ${PREFIX}:C:AS56040:OutputConfigM:ATOP:ACORE:SM:RFDACPole:St | waveform | longout | RFDAC PoleOutput Configuration Data[3:0] |
|
| ${PREFIX}:M:ATOP:ACORE:SM:loPllPhase:Rd | longin | DC:ATTN0 | ${PREFIX}:DC_ATT0LO Phase Error | ${PREFIX}:M:ATOP:ACORE:B0:SMAtt0:loPllAmplitudeSetValue:RdSt, | longinlongout | LO AmplitudeSerial Attenuator |
|
| ${PREFIX}:M:ATOP:ACORE:SM:loPllLocked:Rd | longin | DC:ATTN1 | ${PREFIX}:DC_ATT1LO PLL Locked | ${PREFIX}:M:ATOP:ACORE:B0:SMAtt1:clockPllPhaseSetValue:RdSt | longin | longout | Serial AttenuatorClock Phase Error |
|
| ${PREFIX}:M:ATOP:ACORE:SM:clockPllAmplitude:Rd | longin | Clock Amplitude | DC:ATTN2 | ${PREFIX}:DC_ATT2 | ${PREFIX}:M:ATOP:ACORE:SMB0:Att2:clockPllLockedSetValue:RdSt | longin | longout | Serial AttenuatorClock PLL Locked |
|
| ${PREFIX}:M:ATOP:ACORE:SM:Status_13:Rd | longin | DC:ATTN3 | ${PREFIX}:DC_ATT3LaserPhaseCon | ${PREFIX}:M:ATOP:ACORE:B0:SMAtt3:Status_14SetValue:RdSt | longinlongout | LaserPhaseErrSerial Attenuator |
|
| ${PREFIX}:M:ATOP:ACORE:SM:Status_15:Rd | longin | DC:ATTN4 | ${PREFIX}:DC_ATT4LaserPhaseSet | ${PREFIX}:M:ATOP:ACORE:B0:SMAtt4:Status_16SetValue:RdSt | longinlongout | LaserUnlockSerial Attenuator |
|
| ${PREFIX}:M:ATOP:ACORE:SM:Status_17:Rd | longin | ADC00 phase | DC:ATTN5 | ${PREFIX}:DC_ATT5 | ${PREFIX}:M:ATOP:ACORE:B0:SMAtt5:Status_18SetValue:RdSt | longin | longout | Serial Attenuator |
|
| ${PREFIX}:UC:ATTN0 | ${PREFIX}:UC_ATT0ADC00 Max | ${PREFIX}:M:ATOP:ACORE:B1:SMAtt0:Status_19SetValue:RdSt | longinlongout | ADC01 MaxSerial Attenuator |
|
| ${PREFIX}:C:ACT:TFR:RxLinkUp:Rd | longin | Receive link status | UC:ATTN1 | ${PREFIX}:UC_ATT1 | ${PREFIX}:M:ATOP:ACORE:SMB1:loDacControlMuxAtt1:SetValue:RdSt | longin | longout | Serial Attenuator LO DAC control 0 for PLL 1 for manual |
|
| ${PREFIX}:M:ATOP:ACORE:SM:clockDacControlMux:Rd | longin | CLK DAC control 0 for PLL 1 for manual | UC:ATTN2 | ${PREFIX}:M:ATOP:ACORE:SM:monitorDacControlMux:Rd | longin | Monitor DAC control | UC_ATT2 | ${PREFIX}:M:ATOP:ACORE:SMB1:Att2:Mux4SetValue:RdSt | longinlongout | laserDaqtrigSerial Attenuator |
|
| ${PREFIX}:M:ATOP:ACORE:SM:Mux5:Rd | longin | Slow laser DAC offset | UC:ATTN3 | ${PREFIX}:UC_ATT3 | ${PREFIX}:M:ATOP:ACORE:B1:SMAtt3:Mux6SetValue:Rd | longin | Not usedSt | longout | Serial Attenuator |
|
|
| ${PREFIX}:OUTPUT_ENABLE | ${PREFIX}:M:ATOP:ACORE:SM: |
Mux7outputEnable: |
RdSt |
longin | bo | Enable output |
RF DAC Select |
|
|
| ${PREFIX}:M:ATOP:ACORE:SM:clockPllReferenceSelect:Rd | longin | OUTPUT_CONFIG | ${PREFIX}:C:AS56040:OutputConfig:St | waveform | Output Configuration Data[3:0] |
|
| ${PREFIX}:LO_PLL_PHASCLK ref ADC select 0: ADC 1_5 1: ADC 1_4 | ${PREFIX}:LO_PLL_PHASE_RBV | ${PREFIX}:M:M:ATOP:ACORE:SM:loPllKploPllPhase:Rd | longin | LO loop P term gainPhase Error |
|
| ${PREFIX}:M:ATOP:ACORE:SM:loPllKi:Rd | longin | LO_PLL_AMP | ${PREFIX}:LO_PLL_AMP_RBVLO loop I term | ${PREFIX}:M:ATOP:ACORE:SM:clockPllKploPllAmplitude:Rd | longinCLK loop P term | LO Amplitude |
|
| ${PREFIX}:LO_PLL_LOCKED | ${PREFIX}:LO_PLL_LOCKED_RBV | ${PREFIX}:MM:ATOP:ACORE:SM:clockPllKiloPllLocked:Rd | longin | LO PLL Locked |
|
| ${PREFIX}:CLK_PLL_PHAS | ${PREFIX}:CLK_PLL_PHASE_RBVCLK loop I term | ${PREFIX}:M:ATOP:ACORE:SM:adPllKiclockPllPhase:Rd | longinADPLL loop I term | Clock Phase Error |
|
| ${PREFIX}:CLK_PLL_AMP | ${PREFIX}:CLK_PLL_AMP_RBV | ${PREFIX}:M:ATOP:ACORE:SM:adPllKpclockPllAmplitude:Rd | longinADPLL loop P term | Clock Amplitude |
|
| ${PREFIX}:CLK_PLL_LOCKED | ${PREFIX}:CLK_PLL_LOCKED_RBV | ${PREFIX}:M:ATOP:ACORE:SM:loPllReferenceSelectclockPllLocked:Rd | longin | LO Clock PLL REF SELECTLocked |
|
| ${PREFIX}:STATUS13 | ${PREFIX}:STATUS13_RBV | ${PREFIX}:M:ATOP:ACORE:SM:CMDregStatus_13:Rd | longin | Laser Repeating Sequence StairLaserPhaseCon |
|
| ${PREFIX}:M:ATOP:ACORE:SM:newphasesetpoint:Rd | longin | New Phase Set point | STATUS14 | ${PREFIX}:STATUS14_RBV | ${PREFIX}:M:ATOP:ACORE:SM:phaseshiftrequestStatus_14:Rd | longin | Phase shift requestLaserPhaseErr |
|
| ${PREFIX}:M:ATOP:ACORE:SM:maxphasestep:Rd | longin | STATUS15 | ${PREFIX}:STATUS15_RBVMaximum phase step | ${PREFIX}:M:ATOP:ACORE:SM:LaserStatus_Kp15:Rd | longin | Laser KpLaserPhaseSet |
|
| ${PREFIX}:M:ATOP:ACORE:SM:Laser_Ki:Rd | longin | Laser Ki | STATUS16 | ${PREFIX}:STATUS16_RBV | ${PREFIX}:M:ATOP:ACORE:SM:LaserdisableStatus_16:Rd | longin | Laser disableLaserUnlock |
|
| ${PREFIX}:M:ATOP:ACORE:SM:LaserPole:Rd | longin | STATUS17 | ${PREFIX}:STATUS17_RBVLaserLoopPole | ${PREFIX}:M:ATOP:ACORE:SM:LaserVCOsetStatus_17:Rd | longin | Set Laser VCO DAC with mux3 equals to 6ADC00 phase |
|
| ${PREFIX}:M:ATOP:ACORE:SM:RFDAC_Kp:Rd | longin | RFDAC Kp | STATUS18 | ${PREFIX}:STATUS18_RBV | ${PREFIX}:M:ATOP:ACORE:SM:RFDACStatus_Ki18:Rd | longin | RFDAC KiADC00 Max |
|
| ${PREFIX}:M:ATOP:ACORE:SM:RFDACPole:Rd | longin | STATUS19 | ${PREFIX}:STATUS19_RBVRFDAC Pole | ${PREFIX}:M:ATOP:ACORE:B0:Att0:SetValueSM:Status_19:Rd | longin | Serial AttenuatorADC01 Max |
|
| ${PREFIX}:M:ATOP:ACORE:B0:Att1:SetValue:Rd | longin | Serial Attenuator | RX_LINK_UP | ${PREFIX}:RX_LINK_UP_RBV | ${PREFIX}:C:ACT:TFR:RxLinkUpM:ATOP:ACORE:B0:Att2:SetValue:Rd | longin | Serial AttenuatorReceive link status |
|
${PREFIX}:M:ATOP:ACORE:B0:Att3:SetValue:Rd | longin | Serial Attenuator | ${PREFIX}:M:ATOP:ACORE:B0:Att4:SetValue:Rd | longin | LO_CTRL_RBV | ${PREFIX}:LO_DAC_CTRL_RBV | ${PREFIX}:LO_DAC_CTRL_MUX_RBVSerial Attenuator | ${PREFIX}:M:ATOP:ACORE:B0SM:Att5:SetValueloDacControlMux:Rd | longinSerial Attenuator | LO DAC control 0 for PLL 1 for manual |
|
${PREFIX}:M:ATOP:ACORE:B1:Att0:SetValue:Rd | longin | CLK_CTRL_RBV | ${PREFIX}:CLK_DAC_CTRL_RBVSerial Attenuator | ${PREFIX}:M:ATOP:ACORE:B1:Att1:SetValue:Rd | longin | Serial AttenuatorCLK_DAC_CTRL_MUX_RBV | ${PREFIX}:M:ATOP:ACORE:B1SM:Att2:SetValueclockDacControlMux:Rd | longin | Serial AttenuatorCLK DAC control 0 for PLL 1 for manual |
|
${PREFIX}:MON_CTRL_RBV | ${PREFIX}:MON_DAC_CTRL_RBV | ${PREFIX}:MON_DAC_CTRL_MUX_RBV | ${PREFIX}:M:ATOP:ACORE:SM:monitorDacControlMuxM:ATOP:ACORE:B1:Att3:SetValue:Rd | longinSerial Attenuator | Monitor DAC control |
|
|
| ${PREFIX}:MUX4_RBV | ${PREFIX}:M:ATOP:ACORE:SM:outputEnableMux4:Rd | bilongin | Enable output |