Data Link Map 

Map from 3/7/2016

Image Added 

Data Fiber Map

Note that E & F are currently going through the fiber breakout box.

Front End Board Map

2/10/2016: Control & data cable assignment needs review. 

0x14084072beb01c00

0x24d04072beb01c00

0x42084072beb01400

0x02d04072beb01c00

0x58d04072beb01400

0x72814100a1b01c00

0x52814100a1b01c00

0x1c084072beb01400 

0x50814100a1b01c00

Image Added

Flange board numbering scheme: 0 is left-most board looking from outside.

*Note: The control link of Layer 2-3B top (11) is mapped to FebFpga 6.

Hybrid Map

...

DAQ map dump from conditions DB

[hole=electron,slot=positron]

...

0H80F112113253

FEB Position	Layer	Side	Type	FEB Number	HybridDataDpm	DataDpm Path	Data Cable
1t	1	-	axial	9	0	10	2	H
	1	-	stereo	9	1	10	1	H
				9	2	10		H
				9	3	9	2
2-3t3b	2	-	stereo	6	0		0	H
	2	-	axial	6	1	7	2	H
	3	-	stereo	6	2	7	1	H
	3	-	axial	6	3	7	0	H
4t	4	hole	axial	5		5	0	F
	4	slot	axial	5	1	4	2
	4	hole	stereo	5	2	4	1	F
	4	slot	stereo	5	3	4	0	F
5t	5	hole	axial	8	0	1	0	E
	5	slot	axial	8	1	0	2	E
	5	hole	stereo	8	2	0		E
	5	slot	stereo	8	3	0	0	E
6t	6	hole	axial	7	0	2	1	E
	6	slot	axial	7	1	2	0	E
	6	hole	stereo	7	2	1	2	E
	6	slot	stereo	7	3	1	1	E
1b	1	-	stereo	2	0		0	G
	1	-	axial	2	1	11	2	G
				2	2	11	1	G
				2	3		0	G
2-3b3t	2	-	axial	0	0	12	3	G
	2	-	stereo	0	1	10
	3	G	3	-	axial	0	2	8		G
	3	-	stereo	0	3	13	2	G
4b	4	hole	stereo	1	0	13	1	G
	4	slot	stereo	1	1	13	0	G
	4	hole	axial	1	2	12	2	G
	4	slot	axial	1	3	12	1	G
5b	5	hole	stereo	4	0	6	1	F
	5	slot	stereo	4	1	6	0	F
	5	hole	axial	4		5	2	F
	5	slot	axial	4	3		1	F
6b	6	hole	stereo	3	0	5	3	F
	6	slot	stereo	3	1		3	F
	6	hole	axial	3	2	1	3	F
	Flange board	JTAG connector	FEB Number (DAQ FEB id)
F0	bottom	not connected
6	slot	axial	3	3	6	2	F

 

Flange Map

Table below mapped out when loading new firmware in 2/2X 2016 - Pelle

Image Removed