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The 2856MHz from Sector-10 is locked to the 2856MHz from Sector-2, but that doesn't necessarily hold true for their respective 476MHz signals.  To provide the triggers we want, we need to align the fiducials.  We need NC and SC timing to align at 71kHz so they can coordinate with the beam generation.  Two options: either design the VME-based Master Trigger Generator (VMTG) which drives the Fiducial Generator at 360Hz to trigger at 71kHz or slide the RF buckets until they align.  The LCLS VMTG samples the AC power line at the 71kHz subharmonic of its RF input and each 360Hz fiducial is coincident with 71kHz.  A TPR card processes both timing systems simultaneously and it measures the relative delay between the NC and SC 71kHz subharmonic.


(Diagram by Matt Weaver)


The idea is to trigger the SC timing system to follow the NC timing system.  The Timing Pattern Generator (TPG) card has 3 TTL inputs for external triggers.  The firmware has the capability to interpret those TTL signals for 1Hz, 60Hz or 360Hz or can also sample the power line to generate independent fiducials. 

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See firmware release details below.

RepositoryURLVersion
slaclab / EvrLockhttps://github.com/slaclab/evr-card-g2/releases/tag/v2.2.0v2.2.0

References