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Term | Description |
|---|---|
ATCA | Advanced Telecommunications Computing Architecture |
BSA | Beam Synchronous Acquisition |
CPU | Central Processing Unit |
EPICS | Experimental Physics and Industrial Control System |
EVR | Event Receiver |
FPGA | Field Programmable Gate Array |
IOC | Input Output Controller |
RF | Radio Frequency |
SHM | Shelf Manager |
TPR | Timing Pattern Receiver |
VCO | Voltage Controlled Oscillator |
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The PCIe TPR can provide up to 12 hardware triggers and/or channels. A channel is a source for a trigger and can be AND-ed or OR-ed with its adjacent channel. The user is also able to control --besides rate-- polarity, delay and width. Below, one can find a comprehensive view of the functionality of the TPR that spans firmware, middleware and software. For more details, please refer to the attached slide deck at the bottom of this page.
(PCIe TPR Firmware and Software - Borrowed from PCIe TPR peer review slide deck, see Reference section below)
IOC Description
The IOC is used in conjunction with the TPR displays to not only read diagnostics from the firmware, but also set up triggers, assign channels to triggers and timestamp Beam Synchronous Acquisition (BSA) data.
IOC Deployment
In this section, IOC deployment details are provided pertaining to the App hosting the phase locker IOC, as well as the IOC name and the assigned CPUs in both Dev and Production.
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See firmware release details below.
Repository | URL | Version |
|---|---|---|
| slaclab / EvrCardG2 | https://github.com/slaclab/evr-card-g2/releases/tag/v2.2.0 | v2.2.0 |
References
TPR Documentation
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Overview
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