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Data Link Map 

Map from 3/7/2016

Image Added 

Data Fiber Map

Note that E & F are currently going through the fiber breakout box.

Front End Board Map

2/10/2016: Control & data cable assignment needs review. 

PortData CableGEF0x70d04072beb01c00F
FEB NumberFEB PositionFEB S/NFEB Device DNAData Flange BoardFlange Control CableControl LinkBoard JTAG conn.
9L1T1F3
0x14084072beb01c00
3 D9

H

bottom
2L1B7
0x24d04072beb01c00
3 D2F2top
6L2-3T3B14F3
0x42084072beb01400
2 C11*Htop
0L2-3B3T6F2
0x02d04072beb01c00
2 C0Gbottom
5L4T5
0x58d04072beb01400
2 C5FF1top
1L4B15F2
0x72814100a1b01c00
1 B1Gmiddle
8L5T11
0x52814100a1b01c00
0 A8F0top
4L5B12
0x1c084072beb01400 
1 B4F1middle
7L6T13F0
0x50814100a1b01c00
0 A7Emiddle
3L6B4F1bottom1 B3


Image Added

Flange board numbering scheme: 0 is left-most board looking from outside.

*Note: The control link of Layer 2-3B top (11) is mapped to FebFpga 6.

Hybrid Map

2/10/2016: Data cable needs review.

DAQ map dump from conditions DB

[hole=electron,slot=positron]


23t8axial23axial   4        6t     11b111  2-3baxial3stereo1033stereo- 13 4axialslot   2      
FEB PositionLayerSideType FEB NumberHybrid

1t

1-axial90
1-stereo91
FEB PositionFEB NumberHybridLayer (cond DB)Type (cond DB) Side (cond DB)DataDpmDataDpm PathData Cable
1t901axial-102H
911stereo-101H
92
   100H932
   93
2-3bH2-stereo60
2stereo-axial0H612
3-7stereoH62
3stereo-71Haxial63
4t4-70Hholeaxial4t50
4slotaxial50F51
4hole 4

2

Fstereo52
4slotstereohole41F53
5t5 40Fholeaxial5t80
5  10Eslotaxial81
5hole 02Estereo82
5slot 01Estereo83
6t6 00Eholeaxial70
6  21Eslotaxial71
6hole 20Estereo72
6  12slotstereoE73
1b  1-Estereo20
1stereo-120Gaxial21
 axial-112  G22
   1G23
2-3t2 110G-axial00
2-12stereoG012
3-axial3G02
3axial-8stereoG03
4b4hole132Gstereo4b10
4slot stereo1G11
4hole 130Gaxial12
4axialhole122Gslotaxial13
5b5hole121G5bstereo40
5  61slotstereoF41
5hole 60Faxial42   
5slotFaxial43
6b6hole51Fstereo6b30
6  53slotstereoF31
6  33holeaxialF32
6  13slotaxialF33

 

 

 

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